On 14/03/13 15:42, Ian Bolton wrote:
We couldn't generate ROR (preferred alias of EXTR when both source registers are the same) for AArch64, when rotating by an immediate, ... until now!This patch includes the pattern and a test. Full regression testing for Linux and bare-metal passed. OK for trunk stage-1? Thanks, Ian 2013-03-14 Ian Bolton <ian.bol...@arm.com> gcc/ * config/aarch64/aarch64.md (*ror<mode>3_insn): New pattern. (*rorsi3_insn_uxtw): Likewise. testsuite/ * gcc.target/aarch64/ror.c: New test.
OK for stage-1 /Marcus
