On Wed, Jan 23, 2013 at 8:08 PM, Uros Bizjak <ubiz...@gmail.com> wrote:

> All things equal, we would like to avoid x87 registers to move DFmode
> immediates to a memory.

Attached patch is much better fix for the above problem. The patch
conditionally disables x87 register preferences when -mfpmath=sse is
in effect.

2013-01-24  Uros Bizjak  <ubiz...@gmail.com>

        * config/i386/constraints.md (Yf): New constraint.
        * config/i386/i386.md (*movdf_internal_rex64): Use Yf*f instead
        of f constraint to conditionaly disable x87 register preferences.
        (*movdf_internal): Ditto.
        (*movsf_internal): Ditto.

testsuite/ChangeLog:

2013-01-24  Uros Bizjak  <ubiz...@gmail.com>

        * gcc.target/i386/movsd.c: New test.

Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline SVN.

Uros.
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 195417)
+++ config/i386/i386.md (working copy)
@@ -2934,9 +2934,9 @@
 
 (define_insn "*movdf_internal_rex64"
   [(set (match_operand:DF 0 "nonimmediate_operand"
-               "=?f,?m,?f,?r,?m,?r,x,x,x,m,Yi,r ")
+               "=Yf*f,m   ,Yf*f,?r ,?m,?r,x,x,x,m,Yi,r ")
        (match_operand:DF 1 "general_operand"
-               "fm ,f ,G ,rm,r ,F ,C,x,m,x,r ,Yi"))]
+               "Yf*fm,Yf*f,G   ,rmC,rC,F ,C,x,m,x,r ,Yi"))]
   "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))
    && (!can_create_pseudo_p ()
        || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
@@ -3074,9 +3074,9 @@
 ;; Possible store forwarding (partial memory) stall in alternative 4.
 (define_insn "*movdf_internal"
   [(set (match_operand:DF 0 "nonimmediate_operand"
-               "=f,m,f,?Yd*r ,!o   ,x,x,x,m,*x,*x,*x,m")
+               "=Yf*f,m   ,Yf*f,?Yd*r ,!o   ,x,x,x,m,*x,*x,*x,m")
        (match_operand:DF 1 "general_operand"
-               "fm,f,G,Yd*roF,FYd*r,C,x,m,x,C ,*x,m ,*x"))]
+               "Yf*fm,Yf*f,G   ,Yd*roF,Yd*rF,C,x,m,x,C ,*x,m ,*x"))]
   "!TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))
    && (!can_create_pseudo_p ()
        || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
@@ -3213,9 +3213,9 @@
 
 (define_insn "*movsf_internal"
   [(set (match_operand:SF 0 "nonimmediate_operand"
-         "=f,m,f,?r ,?m,x,x,x,m,!*y,!m,!*y,?Yi,?r,!*Ym,!r")
+         "=Yf*f,m   ,Yf*f,?r ,?m,x,x,x,m,!*y,!m,!*y,?Yi,?r,!*Ym,!r")
        (match_operand:SF 1 "general_operand"
-         "fm,f,G,rmF,Fr,C,x,m,x,m  ,*y,*y ,r  ,Yi,r   ,*Ym"))]
+         "Yf*fm,Yf*f,G   ,rmF,rF,C,x,m,x,m  ,*y,*y ,r  ,Yi,r   ,*Ym"))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))
    && (!can_create_pseudo_p ()
        || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
Index: config/i386/constraints.md
===================================================================
--- config/i386/constraints.md  (revision 195417)
+++ config/i386/constraints.md  (working copy)
@@ -93,6 +93,7 @@
 ;;  p  Integer register when TARGET_PARTIAL_REG_STALL is disabled
 ;;  d  Integer register when integer DFmode moves are enabled
 ;;  x  Integer register when integer XFmode moves are enabled
+;;  f  x87 register when 80387 floating point arithmetic is enabled
 
 (define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
  "First SSE register (@code{%xmm0}).")
@@ -124,6 +125,10 @@
  "optimize_function_for_speed_p (cfun) ? GENERAL_REGS : NO_REGS"
  "@internal Any integer register when integer XFmode moves are enabled.")
 
+(define_register_constraint "Yf"
+ "(ix86_fpmath & FPMATH_387) ? FLOAT_REGS : NO_REGS"
+ "@internal Any x87 register when 80387 FP arithmetic is enabled.")
+
 (define_constraint "z"
   "@internal Constant call address operand."
   (match_operand 0 "constant_call_address_operand"))
Index: testsuite/gcc.target/i386/movsd.c
===================================================================
--- testsuite/gcc.target/i386/movsd.c   (revision 0)
+++ testsuite/gcc.target/i386/movsd.c   (revision 0)
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -msse2 -mfpmath=sse" } */
+
+volatile double y;
+
+void
+test ()
+{
+  int z;
+
+  for (z = 0; z < 1000; z++)
+    y = 1.23;
+}
+
+/* { dg-final { scan-assembler-not "(fld|fst)" } } */

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