> -----Original Message----- > From: Matthew Gretton-Dann [mailto:matthew.gretton-d...@linaro.org] > Sent: Friday, November 16, 2012 6:30 PM > To: Bin Cheng > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH ARM]Define LOGICAL_OP_NON_SHORT_CIRCUIT for ARM target > > On 16 November 2012 05:37, Bin Cheng <bin.ch...@arm.com> wrote: > > Hi, > > This patch defines LOGICAL_OP_NON_SHORT_CIRCUIT for ARM target and > > prefers short circuit for armv6-m and Thumb2+Os. > > > > > =================================================================== > > --- gcc/config/arm/arm.h (revision 193494) > > +++ gcc/config/arm/arm.h (working copy) > > @@ -2012,10 +2012,16 @@ enum arm_auto_incmodes > > || (X) == arg_pointer_rtx) > > > > /* Try to generate sequences that don't involve branches, we can then use > > - conditional instructions */ > > + conditional instructions. */ > > #define BRANCH_COST(speed_p, predictable_p) \ > > (current_tune->branch_cost (speed_p, predictable_p)) > > > > +/* False if short circuit operation is preferred. */ #define > > +LOGICAL_OP_NON_SHORT_CIRCUIT \ > > + ((optimize_size) \ > > + ? (TARGET_THUMB ? false : true) \ > > + : (current_tune->logical_op_non_short_circuit[TARGET_ARM])) > > + > > This changes the definition of LOGICAL_OP_NON_SHORT_CIRCUIT for all cores > supported by the ARM backend. > > In gcc/fold-const.c LOGICAL_OP_NON_SHORT_CIRCUIT is defined as follows: > > #ifndef LOGICAL_OP_NON_SHORT_CIRCUIT > #define LOGICAL_OP_NON_SHORT_CIRCUIT \ > (BRANCH_COST (optimize_function_for_speed_p (cfun), \ > false) >= 2) > #endif > > Now whilst this is probably wrong for most ARM cores, can you please keep it > as the default for cores which you haven't benchmarked the change on? The > optimise for code size changes are probably on all cores without further > testing. >
Thanks for your comments, I am not sure what's the meaning of "probably wrong for most ARM cores", I deduced the value of field "logical_op_non_short_circuit" from the previously default macro and the BRANCH_COST for all arm tune_params, so this patch should not change the behavior on ARM cores other than v6m. Or did I miss something? Thanks.
