From: Andi Kleen <a...@linux.intel.com>
Make a first stab at the undocumented HLE_ACQUIRE/RELEASE
memory model modifiers in the documentation
gcc/:
2012-11-09 Andi Kleen <a...@linux.intel.com>
* doc/extend.texi: Document __ATOMIC_HLE_ACQUIRE and RELEASE.
---
gcc/doc/extend.texi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 54fd548..248977d 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -7194,6 +7194,16 @@ Full barrier in both directions and synchronizes with
acquire loads and
release stores in all threads.
@end table
+Additional target specific flags that can be ored with the memory models.
+@table @code
+@item __ATOMIC_HLE_ACQUIRE
+(on i386/x86_64). Start a Hardware Lock Elision transaction with the atomic
+operation. The memory model must be @code{__ATOMIC_ACQUIRE} or stronger.
+@item __ATOMIC_HLE_RELEASE
+(on i386/x86_64). Commit a Hardware Lock Elision transaction with the atomic
+operation. The memory model must be @code{__ATOMIC_RELEASE} or stronger.
+@end table
+
When implementing patterns for these built-in functions, the memory model
parameter can be ignored as long as the pattern implements the most
restrictive @code{__ATOMIC_SEQ_CST} model. Any of the other memory models
--
1.7.11.5
