Hi, When running libstdc++ regression test on Cortex-M0, the case 49445.cc fails with error message:
/tmp/ccMqZdgc.o: In function `std::atomic<float>::load(std::memory_order)
const':^M
/home/build/work/GCC-4-7-build/build-native/gcc-final/arm-none-eabi/armv6-m/
libstdc++-v3/include/atomic:202: undefined reference to
`__sync_synchronize'^M
/home/build/work/GCC-4-7-build/build-native/gcc-final/arm-none-eabi/armv6-m/
libstdc++-v3/include/atomic:202: undefined reference to
`__sync_synchronize'^M
/tmp/ccMqZdgc.o: In function `std::atomic<tacos>::load(std::memory_order)
const':^M
/home/build/work/GCC-4-7-build/build-native/gcc-final/arm-none-eabi/armv6-m/
libstdc++-v3/include/atomic:202: undefined reference to
`__sync_synchronize'^M
/home/build/work/GCC-4-7-build/build-native/gcc-final/arm-none-eabi/armv6-m/
libstdc++-v3/include/atomic:202: undefined reference to
`__sync_synchronize'^M
collect2: error: ld returned 1 exit status^M
compiler exited with status 1
After investigation, the reason is current gcc doesn't think armv6-m has DMB
instruction. While according to ARM manuals, it has. With this wrong
assumption, the expand_mem_thread_fence will generate a call to library
function __sync_synchronize rather than DMB instruction. While no code to
implement this library function, so the error generates.
The attached patch intends to fix this issue by letting gcc also think
armv6-m has DMB instruction. Is it OK to trunk?
BR,
Terry
2012-10-08 Terry Guo <terry....@arm.com>
* config/arm/arm.c (arm_arch6m): New variable to denote armv6-m
architecture.
* config/arm/arm.h (TARGET_HAVE_DMB): The armv6-m also has DMB
instruction.
armv6m-dmb.patch
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