On 2026-07-13 22:25, Christophe Lyon wrote:
Le lun. 13 juil. 2026, 17:01, Torbjörn SVENSSON <[email protected] <mailto:[email protected]>> a écrit : Ok for trunk, releases/gcc-16 and releases/gcc-15? -- In r15-1579-g792f97b44ffc5e, a new late-combine pass was introduced that changes the generated assembler from ldr r3, [sp] vdup.32 q8, r3 to vld1.32 {d16[], d17[]}, [sp] with -mthumb and from vmov r3, s0 @ int vdup.32 q8, r3 to vdup.32 q8, d0[0] with -marm. In both modes, the check /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, r[0-9]+} 4 } } */ will no longer match. Avoid the fail state by disabling the late-combine pass. Wasn't Alexandre 's patch in gcc-16-7209-gc035985fd611 supposed to fix that?
r16-7209-gc035985fd611 only fixes tests where -mthumb is not used. I'm currently only testing in thumb mode, so I haven't noticed the test improvement with Alexandre's patch. Regardless, I think his patch is not needed if my patch goes in, although I don't think it hurts to stay. I've re-confirmed that the failures are still present in r17-2366-gcfc5aa4ed975c4 with -mthumb without my patch. Kind regards, Torbjörn
Maybe it was applied to gcc16 at that time? (Note that Linaro CI sent a notification when it was applied, so it didn't fully fix the problem AFAIU) Thanks, Christophe gcc/testsuite/ChangeLog: PR testsuite/124043 * gcc.target/arm/crypto-vsha1cq_u32.c: Add -fno-late-combine-instructions to test. * gcc.target/arm/crypto-vsha1h_u32.c: Likewise. * gcc.target/arm/crypto-vsha1mq_u32.c: Likewise. * gcc.target/arm/crypto-vsha1pq_u32.c: Likewise. Signed-off-by: Torbjörn SVENSSON <[email protected] <mailto:[email protected]>> --- gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c | 2 +- gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c | 2 +- gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c | 2 +- gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c index 0cadd19c4dc..8c26ac204d2 100644 --- a/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c +++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_crypto_ok } */ /* { dg-add-options arm_crypto } */ -/* { dg-additional-options "-O3" } */ +/* { dg-additional-options "-O3 -fno-late-combine-instructions" } */ #include "arm_neon.h" diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c index 33af705c59e..c8a47f16991 100644 --- a/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c +++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_crypto_ok } */ /* { dg-add-options arm_crypto } */ -/* { dg-additional-options "-O3" } */ +/* { dg-additional-options "-O3 -fno-late-combine-instructions" } */ #include "arm_neon.h" diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c index bdd1c4f3315..a5a0103049b 100644 --- a/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c +++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_crypto_ok } */ /* { dg-add-options arm_crypto } */ -/* { dg-additional-options "-O3" } */ +/* { dg-additional-options "-O3 -fno-late-combine-instructions" } */ #include "arm_neon.h" diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c index d48a07c6fa4..9ef962c28ae 100644 --- a/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c +++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_crypto_ok } */ /* { dg-add-options arm_crypto } */ -/* { dg-additional-options "-O3" } */ +/* { dg-additional-options "-O3 -fno-late-combine-instructions" } */ #include "arm_neon.h"-- 2.43.0
