[PATCH] RISC-V: Fix typo in gcc.dg/asm-hard-reg-4.c

[Craig Blackmore]

The scan assembler test was not being run for RISC-V due to a typo in
the target selector.

gcc/testsuite/ChangeLog:

        * gcc.dg/asm-hard-reg-4.c: Fix typo in target selector.
---
 gcc/testsuite/gcc.dg/asm-hard-reg-4.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-4.c 
b/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
index 01ae3ad5a7a..6f32e439e05 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
@@ -13,7 +13,7 @@
 /* { dg-final { scan-assembler-times "foo\t5" 4 { target { powerpc*-*-* } } } 
} */
 #elif defined (__riscv)
 # define FPR "{fa5}"
-/* { dg-final { scan-assembler-times "foo\tfa5" 4 { target { rsicv*-*-* } } } 
} */
+/* { dg-final { scan-assembler-times "foo\tfa5" 4 { target { riscv*-*-* } } } 
} */
 #elif defined (__s390__)
 # define FPR "{f5}"
 /* { dg-final { scan-assembler-times "foo\t%f5" 4 { target { s390*-*-* } } } } 
*/
-- 
2.43.0