On Thu, 2 Jul 2026, Christophe Lyon wrote:

> From: Richard Earnshaw <[email protected]>
> 
> This patch applies almost cleanly to gcc-15, OK to backport?

OK
 
> I only had to keep the line about arm_iwmmxt_ok in
> gcc.target/arm/ivopts.c because iwmmxt was removed in gcc-16.
>
> Thanks,
> 
> Christophe
> 
> 
> ---
> 
> Code size tests on Arm are notoriously flaky because there are
> numerous ISA variants (Arm, Thumb-1 and Thumb-2) to consider in
> addition to a number of other variants from multiple sub-architecture
> and micro-architectural tuning options.  In combination this means
> that we have continuous testsuite churn if the constraints are tight
> enough to detect real regressions.
> 
> So this patch eliminates most of these checks, except where the code
> size test is the only test that is done (other than the compilation
> itself).  Where that is the case I've tightened the compiler options
> to limit the test to one set of architecture flags, thereby
> eliminating most of the sources of variation.
> 
> In some cases I've replaced a code-size check with some other test of
> the output, based on the intent of the original patch that motivated
> the test.  For example, the max-insns-skipped test now checks that an
> IT instruction is not generated rather than checking the size of the
> binary (which was a side-effect of not generating IT).
> 
> gcc/testsuite/ChangeLog:
> 
>       * lib/target-supports.exp: Add arm_arch_v7a_thumb.
>       * gcc.target/arm/ifcvt-size-check.c: Add options to force thumb1.
>       * gcc.target/arm/ivopts-2.c: Remove object size check.
>       * gcc.target/arm/ivopts-3.c: Likewise.
>       * gcc.target/arm/ivopts-4.c: Likewise.
>       * gcc.target/arm/ivopts-5.c: Likewise.
>       * gcc.target/arm/ivopts.c: Likewise.
>       * gcc.target/arm/max-insns-skipped.c: Scan for absence of an IT
>       instruction.  Remove object size check.  Use arm_arch_v7a_thumb.
>       * gcc.target/arm/pr43597.c: Remove object size check and use
>       arm_arch_v7a_thumb.
>       * gcc.target/arm/pr63210.c: Use arm_arch_v5t_thumb options.
>       * gcc.target/arm/split-live-ranges-for-shrink-wrap.c: Remove
>       object size check and use arm_arch_v5t_thumb options.
> 
> (cherry picked from commit e1077ad5753148892871fa146f3948b55c46f7e3
> with a slight modification for gcc.target/arm/ivopts.c, to keep the
> line about arm_iwmmxt_ok because iwmmxt was removed in gcc-16)
> ---
>  gcc/testsuite/gcc.target/arm/ifcvt-size-check.c          | 5 +++--
>  gcc/testsuite/gcc.target/arm/ivopts-2.c                  | 4 +---
>  gcc/testsuite/gcc.target/arm/ivopts-3.c                  | 4 +---
>  gcc/testsuite/gcc.target/arm/ivopts-4.c                  | 4 +---
>  gcc/testsuite/gcc.target/arm/ivopts-5.c                  | 4 +---
>  gcc/testsuite/gcc.target/arm/ivopts.c                    | 5 +----
>  gcc/testsuite/gcc.target/arm/max-insns-skipped.c         | 7 ++++---
>  gcc/testsuite/gcc.target/arm/pr43597.c                   | 7 +++----
>  gcc/testsuite/gcc.target/arm/pr63210.c                   | 7 +++----
>  .../gcc.target/arm/split-live-ranges-for-shrink-wrap.c   | 9 +++------
>  gcc/testsuite/lib/target-supports.exp                    | 1 +
>  11 files changed, 22 insertions(+), 35 deletions(-)
> 
> diff --git a/gcc/testsuite/gcc.target/arm/ifcvt-size-check.c 
> b/gcc/testsuite/gcc.target/arm/ifcvt-size-check.c
> index 43fa16b82b5..40b0bdf5223 100644
> --- a/gcc/testsuite/gcc.target/arm/ifcvt-size-check.c
> +++ b/gcc/testsuite/gcc.target/arm/ifcvt-size-check.c
> @@ -1,6 +1,7 @@
>  /* { dg-do assemble } */
> -/* { dg-options "-mthumb -Os " }  */
> -/* { dg-require-effective-target arm_thumb1_ok } */
> +/* { dg-require-effective-target arm_arch_v4t_thumb_ok } */
> +/* { dg-options "-Os" } */
> +/* { dg-add-options arm_arch_v4t_thumb } */
>  
>  int
>  test (unsigned char iov_len, int count, int i)
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts-2.c 
> b/gcc/testsuite/gcc.target/arm/ivopts-2.c
> index f1d5edbe0fd..600005a170e 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts-2.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts-2.c
> @@ -1,5 +1,4 @@
> -/* { dg-do assemble } */
> -/* { dg-options "-Os -fdump-tree-ivopts -save-temps" } */
> +/* { dg-options "-Os -fdump-tree-ivopts" } */
>  
>  extern void foo2 (short*);
>  
> @@ -14,4 +13,3 @@ tr4 (short array[], int n)
>  
>  /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
>  /* { dg-final { scan-tree-dump-times "PHI <" 1 "ivopts"} } */
> -/* { dg-final { object-size text <= 26 { target { arm_thumb2 && { ! 
> arm*-*-uclinuxfdpiceabi } } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts-3.c 
> b/gcc/testsuite/gcc.target/arm/ivopts-3.c
> index 357350cbe10..4860566aa98 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts-3.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts-3.c
> @@ -1,5 +1,4 @@
> -/* { dg-do assemble } */
> -/* { dg-options "-Os -fdump-tree-ivopts -save-temps" } */
> +/* { dg-options "-Os -fdump-tree-ivopts" } */
>  
>  extern unsigned int foo2 (short*) __attribute__((pure));
>  
> @@ -16,4 +15,3 @@ tr3 (short array[], unsigned int n)
>  /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
>  /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
>  /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
> -/* { dg-final { object-size text <= 30 { target { arm_thumb2 && { ! 
> arm*-*-uclinuxfdpiceabi } } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts-4.c 
> b/gcc/testsuite/gcc.target/arm/ivopts-4.c
> index 2e866c01823..8e1ca5ed37c 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts-4.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts-4.c
> @@ -1,5 +1,4 @@
> -/* { dg-do assemble } */
> -/* { dg-options "-Os -fdump-tree-ivopts -save-temps" } */
> +/* { dg-options "-Os -fdump-tree-ivopts" } */
>  
>  extern unsigned int foo (int*) __attribute__((pure));
>  
> @@ -17,4 +16,3 @@ tr2 (int array[], int n)
>  /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
>  /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
>  /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
> -/* { dg-final { object-size text <= 36 { target { arm_thumb2 && { ! 
> arm*-*-uclinuxfdpiceabi } } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts-5.c 
> b/gcc/testsuite/gcc.target/arm/ivopts-5.c
> index 4e8e3806829..0f6930fcd6d 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts-5.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts-5.c
> @@ -1,5 +1,4 @@
> -/* { dg-do assemble } */
> -/* { dg-options "-Os -fdump-tree-ivopts -save-temps" } */
> +/* { dg-options "-Os -fdump-tree-ivopts" } */
>  
>  extern unsigned int foo (int*) __attribute__((pure));
>  
> @@ -16,4 +15,3 @@ tr1 (int array[], unsigned int n)
>  /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
>  /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
>  /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
> -/* { dg-final { object-size text <= 30 { target { arm_thumb2 && { ! 
> arm*-*-uclinuxfdpiceabi } } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/ivopts.c 
> b/gcc/testsuite/gcc.target/arm/ivopts.c
> index 582fdab7836..52571bf860c 100644
> --- a/gcc/testsuite/gcc.target/arm/ivopts.c
> +++ b/gcc/testsuite/gcc.target/arm/ivopts.c
> @@ -1,5 +1,4 @@
> -/* { dg-do assemble } */
> -/* { dg-options "-Os -fdump-tree-ivopts -save-temps 
> -fno-tree-loop-distribute-patterns" } */
> +/* { dg-options "-Os -fdump-tree-ivopts -fno-tree-loop-distribute-patterns" 
> } */
>  
>  void
>  tr5 (short array[], int n)
> @@ -11,6 +10,4 @@ tr5 (short array[], int n)
>  }
>  
>  /* { dg-final { scan-tree-dump-times "PHI <" 1 "ivopts"} } */
> -/* { dg-final { object-size text <= 20 { target { 
> arm_thumb2_no_arm_v8_1m_lob } } } } */
> -/* { dg-final { object-size text <= 32 { target { arm_nothumb && { ! 
> arm_iwmmxt_ok } } } } } */
>  /* { dg-final { object-size text <= 36 { target { arm_nothumb && 
> arm_iwmmxt_ok }  } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/max-insns-skipped.c 
> b/gcc/testsuite/gcc.target/arm/max-insns-skipped.c
> index 0a11554b52b..d177d4c28bf 100644
> --- a/gcc/testsuite/gcc.target/arm/max-insns-skipped.c
> +++ b/gcc/testsuite/gcc.target/arm/max-insns-skipped.c
> @@ -1,5 +1,6 @@
> -/* { dg-do assemble { target arm_thumb2 } } */
> -/* { dg-options " -Os " } */
> +/* { dg-require-effective-target arm_arch_v7a_thumb_ok } */
> +/* { dg-options "-Os" } */
> +/* { dg-add-options arm_arch_v7a_thumb } */
>  
>  int t (int a, int b, int c, int d)
>  {
> @@ -18,4 +19,4 @@ int t (int a, int b, int c, int d)
>    return r;
>  }
>  
> -/* { dg-final { object-size text <= 40 } } */
> +/* { dg-final { scan-assembler-not {\tit[tf]*\t} } } */
> diff --git a/gcc/testsuite/gcc.target/arm/pr43597.c 
> b/gcc/testsuite/gcc.target/arm/pr43597.c
> index 6c9d4196c00..520b4038a46 100644
> --- a/gcc/testsuite/gcc.target/arm/pr43597.c
> +++ b/gcc/testsuite/gcc.target/arm/pr43597.c
> @@ -1,6 +1,6 @@
> -/* { dg-do assemble } */
> -/* { dg-options "-Os -save-temps -mthumb" } */
> -/* { dg-require-effective-target arm_thumb2_ok } */
> +/* { dg-require-effective-target arm_arch_v7a_thumb_ok } */
> +/* { dg-options "-Os" } */
> +/* { dg-add-options arm_arch_v7a_thumb } */
>  
>  extern int bar ();
>  extern void bar2 (int);
> @@ -24,4 +24,3 @@ foo4 ()
>  
>  /* { dg-final { scan-assembler-times "sub" 1 } } */
>  /* { dg-final { scan-assembler-times "cmp" 0 } } */
> -/* { dg-final { object-size text <= 30 { target { ! arm*-*-uclinuxfdpiceabi 
> } } } } */
> diff --git a/gcc/testsuite/gcc.target/arm/pr63210.c 
> b/gcc/testsuite/gcc.target/arm/pr63210.c
> index 9b63a67d3f0..c663ab85705 100644
> --- a/gcc/testsuite/gcc.target/arm/pr63210.c
> +++ b/gcc/testsuite/gcc.target/arm/pr63210.c
> @@ -1,8 +1,7 @@
>  /* { dg-do assemble } */
> -/* { dg-options "-mthumb -Os " }  */
> -/* { dg-require-effective-target arm_thumb1_ok } */
> -/* { dg-skip-if "do not test on armv4t" { *-*-* } { "-march=armv4t" } } */
> -/* { dg-additional-options "-march=armv5t" {target arm_arch_v5t_ok} } */
> +/* { dg-options "-Os" }  */
> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> +/* { dg-add-options arm_arch_v5t_thumb } */
>  
>  int foo1 (int c);
>  int foo2 (int c);
> diff --git a/gcc/testsuite/gcc.target/arm/split-live-ranges-for-shrink-wrap.c 
> b/gcc/testsuite/gcc.target/arm/split-live-ranges-for-shrink-wrap.c
> index 67a7fc85003..c146f608a24 100644
> --- a/gcc/testsuite/gcc.target/arm/split-live-ranges-for-shrink-wrap.c
> +++ b/gcc/testsuite/gcc.target/arm/split-live-ranges-for-shrink-wrap.c
> @@ -1,8 +1,6 @@
> -/* { dg-do assemble } */
> -/* { dg-options "-mthumb -Os -fdump-rtl-ira " }  */
> -/* { dg-require-effective-target arm_thumb1_ok } */
> -/* { dg-skip-if "do not test on armv4t" { *-*-* } { "-march=armv4t" } } */
> -/* { dg-additional-options "-march=armv5t" {target arm_arch_v5t_ok} } */
> +/* { dg-options "-Os -fdump-rtl-ira " } */
> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> +/* { dg-add-options arm_arch_v5t_thumb } */
>  
>  int foo (char *, char *, int);
>  int test (int d, char * out, char *in, int len)
> @@ -11,5 +9,4 @@ int test (int d, char * out, char *in, int len)
>      foo (out, in, len);
>    return 0;
>  }
> -/* { dg-final { object-size text <= 20 } } */
>  /* { dg-final { scan-rtl-dump-not "Split live-range of register" "ira" } } */
> diff --git a/gcc/testsuite/lib/target-supports.exp 
> b/gcc/testsuite/lib/target-supports.exp
> index a0e4687b175..9f18d5e4887 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -6055,6 +6055,7 @@ foreach { armfunc armflag armdefs } {
>       v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
>       v7a "-march=armv7-a+fp" __ARM_ARCH_7A__
>       v7a_arm "-march=armv7-a+fp -marm" "__ARM_ARCH_7A__ && !__thumb__"
> +     v7a_thumb "-march=armv7-a+fp -mthumb" "__ARM_ARCH_7A__ && __thumb__"
>       v7a_fp_hard "-march=armv7-a+fp -mfpu=auto -mfloat-abi=hard" 
> __ARM_ARCH_7A__
>       v7a_neon "-march=armv7-a+simd -mfpu=auto -mfloat-abi=softfp" 
> "__ARM_ARCH_7A__ && __ARM_NEON__"
>       v7a_neon_thumb "-march=armv7-a+simd -mfpu=auto -mfloat-abi=softfp 
> -mthumb" "__ARM_ARCH_7A__ && __ARM_NEON__ && __thumb__"
> 

-- 
Richard Biener <[email protected]>
SUSE Software Solutions Germany GmbH,
Frankenstrasse 146, 90461 Nuernberg, Germany;
GF: Jochen Jaser, Andrew McDonald; (HRB 36809, AG Nuernberg)

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