From: Matthew Fortune <[email protected]>
gcc/
* config/mips/mips.cc (mips_store_by_pieces_p): Account for
LWL/LWR in store_by_pieces_p.
gcc/testsuite/
* gcc.target/mips/store-by-pieces-1.c: New test.
Cherry-picked 53d838794ad3379fdd8d1f3a812aa8f2dff56399
from https://github.com/MIPS/gcc
Signed-off-by: Matthew Fortune <[email protected]>
Signed-off-by: Faraz Shahbazker <[email protected]>
Signed-off-by: Aleksandar Rakic <[email protected]>
Signed-off-by: Eldar Osmanovic <[email protected]>
---
gcc/config/mips/mips.cc | 6 ++++--
.../gcc.target/mips/store-by-pieces-1.c | 19 +++++++++++++++++++
2 files changed, 23 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/mips/store-by-pieces-1.c
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 215ea63c74d..3f123523849 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -8432,7 +8432,7 @@ mips_store_by_pieces_p (unsigned HOST_WIDE_INT size,
unsigned int align)
LW/SWL/SWR sequence. This is often better than the 4 LIs and
4 SBs that we would generate when storing by pieces. */
if (align <= BITS_PER_UNIT)
- return size < 4;
+ return size < 4 || !ISA_HAS_LWL_LWR;
/* If the data is 2-byte aligned, then:
@@ -8467,7 +8467,9 @@ mips_store_by_pieces_p (unsigned HOST_WIDE_INT size,
unsigned int align)
(c4) A block move of 8 bytes can use two LW/SW sequences or a single
LD/SD sequence, and in these cases we've traditionally preferred
the memory copy over the more bulky constant moves. */
- return size < 8;
+ return (size < 8
+ || (align < 4 * BITS_PER_UNIT
+ && !ISA_HAS_LWL_LWR));
}
/* Emit straight-line code to move LENGTH bytes from SRC to DEST.
diff --git a/gcc/testsuite/gcc.target/mips/store-by-pieces-1.c
b/gcc/testsuite/gcc.target/mips/store-by-pieces-1.c
new file mode 100644
index 00000000000..b382dee5369
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/store-by-pieces-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "isa_rev>=6 -mno-unaligned-access" } */
+
+char aligned2_dest[10] __attribute__ ((aligned (4)));
+
+void
+store_aligned1 (char *p)
+{
+ __builtin_memcpy (p, "12345", 5);
+}
+
+void
+store_aligned2 (void)
+{
+ __builtin_memcpy (aligned2_dest + 2, "12345678", 8);
+}
+
+/* { dg-final { scan-assembler-not "\tmemcpy" } } */
+/* { dg-final { scan-assembler-not "\tlhu\t" } } */
--
2.43.0
