On 09/28/2012 12:59 AM, Vladimir Makarov wrote: > + We keep RTL code at most time in such state that the virtual > + registers can be changed by just the corresponding hard registers > + (with zero offsets) and we have the right RTL code. To achieve this > + we should add initial offset at the beginning of LRA work and update > + offsets after each stack expanding. But actually we update virtual > + registers to the same virtual registers + corresponding offsets > + before every constraint pass because it affects constraint > + satisfaction (e.g. an address displacement became too big for some > + target). > + > + The final change of virtual registers to the corresponding hard > + registers are done at the very end of LRA when there were no change > + in offsets anymore: > + > + fp + 42 => sp + 42
Let me try to understand this. We have (mem (fp)), which we rewrite to (mem (fp + 42)), but this is intended to represent (mem (sp + 42))? Wouldn't this fail on any target which has different addressing ranges for SP and FP? Bernd
