Applied to master as 188731cde7a5, thanks! --Philipp.
On Mon, 15 Jun 2026 at 18:17, Jeffrey Law <[email protected]> wrote: > > > On 6/15/2026 9:39 AM, Konstantinos Eleftheriou wrote: > > The multi-word narrowing path in store_integral_bit_field uses > > simplify_gen_subreg followed by gcc_assert (op0). The symmetric path > > in extract_integral_bit_field was switched to force_subreg, but the > > store side was deliberately left on simplify_gen_subreg because op0 > > is an lvalue. When the subreg simplification fails (e.g. a vector > > op0 punned through an int mode whose word-aligned subregs are rejected > > by validate_subreg, as happens for V8SI on -mbig-endian aarch64), > > the assert fires. > > > > The avoid-store-forwarding pass (-favoid-store-forwarding) triggers > > this: it routes such a vector op0 through store_integral_bit_field. > > > > Replace the assert with a graceful fallback to store_split_bit_field, > > mirroring the cross-word branch immediately above. No change for > > inputs where the narrowing succeeds. > > > > Tested on AArch64, x86-64 and PowerPC BE. > > > > PR rtl-optimization/123754 > > > > gcc/ChangeLog: > > > > * expmed.cc (store_integral_bit_field): When the SUBREG > > narrowing fails, defer to store_split_bit_field instead of > > asserting. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/aarch64/pr123754.c: New test. > > * gcc.target/aarch64/avoid-store-forwarding-be-2.c: New test. > OK > jeff
