Originally this patch was supposed to address SIMD highpart builtin folding identified by a missed opportunity to use a highpart instruction inside an intrinsic [1].
The patch for this then lead to an issue regarding vector duplication, since we are using both the high and low part of a uniform vector ideally we would load/duplicate only once but instead the compiler was duplicating into two registers of different lengths. This seemed to be because the compiler was lacking the foresight to collapse these operations when a wider vector duplication appears after a narrow duplicatioin of the same vector. The second patch in this series addresses that subsequent issue by modifiying CSE to identify related duplications during prescan and rewrite them so that the widest duplication happens first and the rest of the operations reuse this one register. Ok for trunk? [1] https://godbolt.org/z/qKqjz7Mvd Dylan Rees (2): aarch64: Improve simd highpart builtin folding middle-end: Eliminate redundant scalar duplication at different vector widths gcc/config/aarch64/aarch64-builtins.cc | 17 +- gcc/cse.cc | 239 +++++++++++++++++- .../aarch64/simd/fold_to_highpart_7.c | 22 ++ gcc/testsuite/gcc.target/i386/pr81501-9a.c | 4 +- gcc/testsuite/gcc.target/i386/pr81501-9b.c | 2 +- 5 files changed, 276 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_7.c -- 2.43.0
