I noticed while reviewing some other code that we have existing code of
the form (unsigned HOST_WIDE_INT) INTVAL (X). Such expressions are (by
definition of UINTVAL) equivalent to UINTVAL (x), and the latter is both
more succint and (IMO) more readable, so this patch replaces those
instances in the aarch64 backend accordingly.
There are also many occurrences of this outside of aarch64, I see:
$ git grep -nE "\(unsigned HOST_WIDE_INT\)\s?INTVAL" | wc -l
73
with this patch applied, but this patch just fixes the aarch64 cases for
now.
Pushed as obvious after a bootstrap/regtest on aarch64-linux-gnu.
Thanks,
Alex
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_strip_extend): Replace
(unsigned HOST_WIDE_INT) INVAL (x) with UINTVAL (x).
* config/aarch64/predicates.md (aarch64_shift_imm_si): Likewise.
(aarch64_shift_imm_di): Likewise.
(aarch64_shift_imm64_di): Likewise.
(aarch64_imm3): Likewise.
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index abd6eb5fd1e..fb31e3684fc 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -14397,7 +14397,7 @@ aarch64_strip_extend (rtx x, bool strip_shift)
if (strip_shift
&& GET_CODE (op) == ASHIFT
&& CONST_INT_P (XEXP (op, 1))
- && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) <= 4)
+ && UINTVAL (XEXP (op, 1)) <= 4)
op = XEXP (op, 0);
if (GET_CODE (op) == ZERO_EXTEND
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 40b0e8b9f02..d64f3172aff 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -254,15 +254,15 @@ (define_predicate "aarch64_logical_and_immediate"
(define_predicate "aarch64_shift_imm_si"
(and (match_code "const_int")
- (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 32")))
+ (match_test "UINTVAL (op) < 32")))
(define_predicate "aarch64_shift_imm_di"
(and (match_code "const_int")
- (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 64")))
+ (match_test "UINTVAL (op) < 64")))
(define_predicate "aarch64_shift_imm64_di"
(and (match_code "const_int")
- (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) <= 64")))
+ (match_test "UINTVAL (op) <= 64")))
(define_predicate "aarch64_reg_or_shift_imm_si"
(ior (match_operand 0 "register_operand")
@@ -276,7 +276,7 @@ (define_predicate "aarch64_reg_or_shift_imm_di"
;; range 0..4.
(define_predicate "aarch64_imm3"
(and (match_code "const_int")
- (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) <= 4")))
+ (match_test "UINTVAL (op) <= 4")))
;; The imm2 field is a 2-bit field that only accepts immediates in the
;; range 0..3.
