Applied to master as ba0d75df9c02. Thanks! --Philipp.
On Thu, 21 May 2026 at 22:47, Jeffrey Law <[email protected]> wrote: > > > > On 5/21/2026 8:06 AM, Konstantinos Eleftheriou wrote: > > The bit-insert sequences generated by store_bit_field can clobber hard > > registers (such as the flags register on x86) as a side effect. If > > such a register is live at the insertion point, the transformation > > would corrupt it, breaking flag-dependent sequences like carry chains > > (see PR119795). > > > > Add a liveness check in process_store_forwarding: after generating the > > bit-insert sequences, collect the hard registers they clobber (excluding > > the intended destination) and reject the transformation if any of them > > is live at the insertion point. Per-insn live-out hard-register sets > > are computed once per BB by simulating it backward with > > df_simulate_one_insn_backwards, and cached in store_forwarding_analyzer > > so subsequent forwarding candidates in the same BB reuse the result. > > The cache is populated lazily on the first candidate that produces > > non-empty clobbers, so on targets where bit-inserts have no side-effect > > clobbers (such as aarch64 bfi) the BB walk never runs. > > > > gcc/ChangeLog: > > > > * avoid-store-forwarding.cc: Include regs.h. > > (record_hard_reg_clobbers): New callback. > > (store_forwarding_analyzer::m_bb_live_after): New cache. > > (store_forwarding_analyzer::compute_bb_live_after): New helper. > > (store_forwarding_analyzer::process_store_forwarding): Add > > liveness check for hard registers clobbered by bit-insert > > sequences, using the cached per-BB live-out information, and > > evict the load_insn entry from the cache before delete_insn > > in the load-elim path. > > (store_forwarding_analyzer::avoid_store_forwarding): Clear the > > per-BB liveness cache on entry. > > > > Signed-off-by: Konstantinos Eleftheriou <[email protected]> > OK > jeff
