> gcc/ChangeLog:
>
> * config/bpf/bpf.md: Remove duplicate mode iterator SIM.
We use different iterators for different categories of instructions even
if they happen to currently cover the same set of modes, like is the
case of AM and SIM, but also JM. I see no reason for changing this at
this point.
> (ashr<SIM:mode>3): Remove.
> (ashr<AM:mode>3): Add.
> (ashl<SIM:mode>3): Remove.
> (ashl<AM:mode>3): Add.
> (lshr<SIM:mode>3): Remove.
> (lshr<AM:mode>3): Add.
>
> Signed-off-by: Vineet Gupta <[email protected]>
> ---
> gcc/config/bpf/bpf.md | 26 ++++++++++++--------------
> 1 file changed, 12 insertions(+), 14 deletions(-)
>
> diff --git a/gcc/config/bpf/bpf.md b/gcc/config/bpf/bpf.md
> index bc739f2746c0..48fa94fd4650 100644
> --- a/gcc/config/bpf/bpf.md
> +++ b/gcc/config/bpf/bpf.md
> @@ -392,28 +392,26 @@
>
> ;;;; Shifts
>
> -(define_mode_iterator SIM [(SI "bpf_has_alu32") DI])
> -
> -(define_insn "ashr<SIM:mode>3"
> - [(set (match_operand:SIM 0 "register_operand" "=r,r")
> - (ashiftrt:SIM (match_operand:SIM 1 "register_operand" " 0,0")
> - (match_operand:SIM 2 "reg_or_imm_operand" " r,I")))]
> +(define_insn "ashr<AM:mode>3"
> + [(set (match_operand:AM 0 "register_operand" "=r,r")
> + (ashiftrt:AM (match_operand:AM 1 "register_operand" " 0,0")
> + (match_operand:AM 2 "reg_or_imm_operand" " r,I")))]
> ""
> "{arsh<msuffix>\t%0,%2|%w0 s>>= %w2}"
> [(set_attr "type" "<mtype>")])
>
> -(define_insn "ashl<SIM:mode>3"
> - [(set (match_operand:SIM 0 "register_operand" "=r,r")
> - (ashift:SIM (match_operand:SIM 1 "register_operand" " 0,0")
> - (match_operand:SIM 2 "reg_or_imm_operand" " r,I")))]
> +(define_insn "ashl<AM:mode>3"
> + [(set (match_operand:AM 0 "register_operand" "=r,r")
> + (ashift:AM (match_operand:AM 1 "register_operand" " 0,0")
> + (match_operand:AM 2 "reg_or_imm_operand" " r,I")))]
> ""
> "{lsh<msuffix>\t%0,%2|%w0 <<= %w2}"
> [(set_attr "type" "<mtype>")])
>
> -(define_insn "lshr<SIM:mode>3"
> - [(set (match_operand:SIM 0 "register_operand" "=r,r")
> - (lshiftrt:SIM (match_operand:SIM 1 "register_operand" " 0,0")
> - (match_operand:SIM 2 "reg_or_imm_operand" " r,I")))]
> +(define_insn "lshr<AM:mode>3"
> + [(set (match_operand:AM 0 "register_operand" "=r,r")
> + (lshiftrt:AM (match_operand:AM 1 "register_operand" " 0,0")
> + (match_operand:AM 2 "reg_or_imm_operand" " r,I")))]
> ""
> "{rsh<msuffix>\t%0,%2|%w0 >>= %w2}"
> [(set_attr "type" "<mtype>")])
