This is the second take on the SVE2.2/SME2.2 support patch series with
feedback for v1[0] from Kyrill and Richard S addressed:
This patch series implements the SVE2.2 and SME2.2 extensions for the
aarch64 architecture.
After some preparatory changes (patch 1) follows the bulk of the series
(patches 2-8), which deals with adding zeroing predication support for
many SVE and SVE2 unary integer and FP instructions, namely:
- (Patch 2) Unary integer arithmetic instructions.
- (Patch 3) Integer sign/zero extension instructions.
- (Patch 4) Integer bit reversal operations.
- (Patch 5) Unary floating-point arithmetic instructions.
- (Patch 6) FP-to-int conversions.
- (Patch 7) Int-to-FP and FP-to-FP conversions.
- (Patch 8) Top (accessing only odd-numbered elements of the wider vector)
widening and narrowing floating-point conversions. This patch is
different from the rest in this group in that it also includes the new _z
versions of the relevant intrinsics (only the _m and _x versions are
currently available).
The next 3 patches add either completely new SVE instructions or new
variants of existing SVE instructions, together with supporting intrinsics:
- (Patch 9) FRINT{32,64}{X,Z} (Convert a 32- or 64-bit floating-point
value to a 32- or 64-bit integer value, rounding either using current
mode or towards zero).
- (Patch 10) FIRSTP/LASTP (Return index of the first/last true element of
an SVE predicate value).
- (Patch 11) 8-bit and 16-bit variants of the COMPACT instruction, as well
as the new EXPAND instruction (Compress and decompress elements in an
SVE vector).
The penultimate patch adds a new SME instruction:
- (Patch 12) FMUL (Multi-vector floating-point multiply by vector /
Multi-vector floating-point multiply)
And finally, patch 13 adds __ARM_FEATURE_ macro definitions and related
tests.
This series is based on these GCC17-bound changes already on the ML but
not yet on the trunk:
- Alfie's FEAT_SSVE_BitPerm patch
(https://gcc.gnu.org/pipermail/gcc-patches/2025-November/699618.html)
- Karl's FEAT_SME_MOP4 series
(https://gcc.gnu.org/pipermail/gcc-patches/2025-December/703420.html)
- Claudio's FEAT_SME_TMOP patch
(https://gcc.gnu.org/pipermail/gcc-patches/2026-January/705823.html)
so ideally it should go in right after those; however, small variations in
this order are OK since conflicts are minimal and limited to
aarch64-sve-builtins*.def, target-supports.exp, and some target macro
tests and are easy enough to resolve.
Another important thing to mention is, as Alice pointed out offline, this
patch series currently does not implement potential codegen improvements
for _x intrinsics that the new zeroing-predication instruction variants
have to offer. (Ideally we'd always want to pick the /z version of an
instruction over the /m version for 'don't care' predication to save a
data dependency.) As of now, I have implemented these for integer
instructions (patches 2-4), but not for floating-point ones (patches 5-8)
as those require a lot more code rearrangement in aarch64-sve{,2}.md and
likely aarch64-sve-builtins*.{cc,h}. Thus, it looks to me that _x codegen
changes warrant a separate series that should come later, but I'd love to
hear more thoughts on how to handle this properly.
Regression-tested on aarch64-linux-gnu.
Changes since v1[0]:
- Split patch 1 into patches 1 (adding internal definitions) and 13
(defining the user-visible __ARM_FEATURE_ macros).
- In patch 4, remove two stray tests for _x intrinsics.
- Define a new predicate accepting a const zero vector only when
SVE2.2/SME2.2 are enabled and use it in patches 4 and 8.
- In patch 9, add a comment specifying for new instruction patterns the
extensions in which those instructions were introduced; additionally,
move the TARGET_SVE2p2_OR_SME2p2 combinatorial test to patch 1.
- In patch 10, fix the FIRSTP instruction implementation by replacing
invalid RTL with a UNSPEC-based pattern, and add a comment similar to
the one in patch 9.
- Rebase the series onto the latest trunk.
[0] https://gcc.gnu.org/pipermail/gcc-patches/2026-February/707394.html
Artemiy Volkov (13):
aarch64: add preliminary definitions for SVE2.2/SME2.2
aarch64: add zeroing forms for predicated SVE integer unary operations
aarch64: add zeroing forms for predicated SVE integer extends
aarch64: add zeroing forms for predicated SVE bit reversal operations
aarch64: add zeroing forms for predicated SVE FP unary operations
aarch64: add zeroing forms for predicated SVE FP-to-integer
conversions
aarch64: add zeroing forms for predicated SVE int-/FP-to-FP
conversions
aarch64: add zeroing forms for predicated SVE top FP conversions
aarch64: implement FRINT32/64 SVE instructions
aarch64: implement FIRSTP and LASTP SVE instructions
aarch64: implement changes for COMPACT and EXPAND SVE instructions
aarch64: implement FMUL SME instruction
aarch64: add __ARM_FEATURE_ macros for SVE2.2 and SME2.2
gcc/config/aarch64/aarch64-c.cc | 2 +
.../aarch64/aarch64-sve-builtins-base.cc | 28 ++-
.../aarch64/aarch64-sve-builtins-base.def | 5 +-
.../aarch64/aarch64-sve-builtins-base.h | 1 +
.../aarch64/aarch64-sve-builtins-functions.h | 41 +++
.../aarch64/aarch64-sve-builtins-sve2.cc | 79 +++++-
.../aarch64/aarch64-sve-builtins-sve2.def | 19 ++
.../aarch64/aarch64-sve-builtins-sve2.h | 6 +
gcc/config/aarch64/aarch64-sve-builtins.cc | 5 +
gcc/config/aarch64/aarch64-sve.md | 234 +++++++++++-------
gcc/config/aarch64/aarch64-sve2.md | 194 +++++++++++----
gcc/config/aarch64/aarch64.h | 16 ++
gcc/config/aarch64/aarch64.md | 8 +-
gcc/config/aarch64/iterators.md | 2 +
gcc/config/aarch64/predicates.md | 9 +
gcc/doc/invoke.texi | 5 +
.../g++.target/aarch64/sve/aarch64-ssve.exp | 4 +-
.../gcc.target/aarch64/pragma_cpp_predefs_3.c | 100 ++++++++
.../gcc.target/aarch64/pragma_cpp_predefs_4.c | 14 ++
.../aarch64/sme2/acle-asm/mul_f16_x2.c | 193 +++++++++++++++
.../aarch64/sme2/acle-asm/mul_f16_x4.c | 227 +++++++++++++++++
.../aarch64/sme2/acle-asm/mul_f32_x2.c | 193 +++++++++++++++
.../aarch64/sme2/acle-asm/mul_f32_x4.c | 227 +++++++++++++++++
.../aarch64/sme2/acle-asm/mul_f64_x2.c | 193 +++++++++++++++
.../aarch64/sme2/acle-asm/mul_f64_x4.c | 227 +++++++++++++++++
.../aarch64/sve2/acle/asm/abs_f16_z.c | 30 +++
.../aarch64/sve2/acle/asm/abs_f32_z.c | 30 +++
.../aarch64/sve2/acle/asm/abs_f64_z.c | 30 +++
.../aarch64/sve2/acle/asm/abs_s16_z.c | 29 +++
.../aarch64/sve2/acle/asm/abs_s32_z.c | 29 +++
.../aarch64/sve2/acle/asm/abs_s64_z.c | 29 +++
.../aarch64/sve2/acle/asm/abs_s8_z.c | 29 +++
.../aarch64/sve2/acle/asm/cls_s16_z.c | 20 ++
.../aarch64/sve2/acle/asm/cls_s32_z.c | 20 ++
.../aarch64/sve2/acle/asm/cls_s64_z.c | 19 ++
.../aarch64/sve2/acle/asm/cls_s8_z.c | 20 ++
.../aarch64/sve2/acle/asm/clz_s16_z.c | 19 ++
.../aarch64/sve2/acle/asm/clz_s32_z.c | 19 ++
.../aarch64/sve2/acle/asm/clz_s64_z.c | 19 ++
.../aarch64/sve2/acle/asm/clz_s8_z.c | 19 ++
.../aarch64/sve2/acle/asm/clz_u16_z.c | 29 +++
.../aarch64/sve2/acle/asm/clz_u32_z.c | 29 +++
.../aarch64/sve2/acle/asm/clz_u64_z.c | 29 +++
.../aarch64/sve2/acle/asm/clz_u8_z.c | 29 +++
.../aarch64/sve2/acle/asm/cnot_s16_z.c | 29 +++
.../aarch64/sve2/acle/asm/cnot_s32_z.c | 29 +++
.../aarch64/sve2/acle/asm/cnot_s64_z.c | 29 +++
.../aarch64/sve2/acle/asm/cnot_s8_z.c | 29 +++
.../aarch64/sve2/acle/asm/cnot_u16_z.c | 30 +++
.../aarch64/sve2/acle/asm/cnot_u32_z.c | 30 +++
.../aarch64/sve2/acle/asm/cnot_u64_z.c | 30 +++
.../aarch64/sve2/acle/asm/cnot_u8_z.c | 30 +++
.../aarch64/sve2/acle/asm/cnt_bf16_z.c | 19 ++
.../aarch64/sve2/acle/asm/cnt_f16_z.c | 19 ++
.../aarch64/sve2/acle/asm/cnt_f32_z.c | 19 ++
.../aarch64/sve2/acle/asm/cnt_f64_z.c | 19 ++
.../aarch64/sve2/acle/asm/cnt_s16_z.c | 19 ++
.../aarch64/sve2/acle/asm/cnt_s32_z.c | 19 ++
.../aarch64/sve2/acle/asm/cnt_s64_z.c | 19 ++
.../aarch64/sve2/acle/asm/cnt_s8_z.c | 19 ++
.../aarch64/sve2/acle/asm/cnt_u16_z.c | 30 +++
.../aarch64/sve2/acle/asm/cnt_u32_z.c | 30 +++
.../aarch64/sve2/acle/asm/cnt_u64_z.c | 30 +++
.../aarch64/sve2/acle/asm/cnt_u8_z.c | 30 +++
.../aarch64/sve2/acle/asm/compact_bf16.c | 28 +++
.../aarch64/sve2/acle/asm/compact_f32.c | 22 ++
.../aarch64/sve2/acle/asm/compact_f64.c | 22 ++
.../aarch64/sve2/acle/asm/compact_mf8.c | 28 +++
.../aarch64/sve2/acle/asm/compact_s16.c | 28 +++
.../aarch64/sve2/acle/asm/compact_s32.c | 22 ++
.../aarch64/sve2/acle/asm/compact_s64.c | 22 ++
.../aarch64/sve2/acle/asm/compact_s8.c | 28 +++
.../aarch64/sve2/acle/asm/compact_u16.c | 28 +++
.../aarch64/sve2/acle/asm/compact_u32.c | 22 ++
.../aarch64/sve2/acle/asm/compact_u64.c | 22 ++
.../aarch64/sve2/acle/asm/compact_u8.c | 28 +++
.../aarch64/sve2/acle/asm/cvt_bf16_z.c | 28 +++
.../aarch64/sve2/acle/asm/cvt_f16_z.c | 160 ++++++++++++
.../aarch64/sve2/acle/asm/cvt_f32_z.c | 122 +++++++++
.../aarch64/sve2/acle/asm/cvt_f64_z.c | 120 +++++++++
.../aarch64/sve2/acle/asm/cvt_s16_z.c | 29 +++
.../aarch64/sve2/acle/asm/cvt_s32_z.c | 67 +++++
.../aarch64/sve2/acle/asm/cvt_s64_z.c | 67 +++++
.../aarch64/sve2/acle/asm/cvt_u16_z.c | 29 +++
.../aarch64/sve2/acle/asm/cvt_u32_z.c | 67 +++++
.../aarch64/sve2/acle/asm/cvt_u64_z.c | 67 +++++
.../aarch64/sve2/acle/asm/cvtlt_f32_z.c | 28 +++
.../aarch64/sve2/acle/asm/cvtlt_f64_z.c | 28 +++
.../aarch64/sve2/acle/asm/cvtnt_bf16_z.c | 34 +++
.../aarch64/sve2/acle/asm/cvtnt_f16_z.c | 34 +++
.../aarch64/sve2/acle/asm/cvtnt_f32_z.c | 34 +++
.../aarch64/sve2/acle/asm/cvtx_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/cvtxnt_f32_z.c | 34 +++
.../aarch64/sve2/acle/asm/expand_bf16.c | 28 +++
.../aarch64/sve2/acle/asm/expand_f32.c | 28 +++
.../aarch64/sve2/acle/asm/expand_f64.c | 28 +++
.../aarch64/sve2/acle/asm/expand_mf8.c | 28 +++
.../aarch64/sve2/acle/asm/expand_s16.c | 28 +++
.../aarch64/sve2/acle/asm/expand_s32.c | 28 +++
.../aarch64/sve2/acle/asm/expand_s64.c | 28 +++
.../aarch64/sve2/acle/asm/expand_s8.c | 28 +++
.../aarch64/sve2/acle/asm/expand_u16.c | 28 +++
.../aarch64/sve2/acle/asm/expand_u32.c | 28 +++
.../aarch64/sve2/acle/asm/expand_u64.c | 28 +++
.../aarch64/sve2/acle/asm/expand_u8.c | 28 +++
.../aarch64/sve2/acle/asm/extb_s16_z.c | 28 +++
.../aarch64/sve2/acle/asm/extb_s32_z.c | 28 +++
.../aarch64/sve2/acle/asm/extb_s64_z.c | 28 +++
.../aarch64/sve2/acle/asm/extb_u16_z.c | 29 +++
.../aarch64/sve2/acle/asm/extb_u32_z.c | 29 +++
.../aarch64/sve2/acle/asm/extb_u64_z.c | 29 +++
.../aarch64/sve2/acle/asm/exth_s32_z.c | 28 +++
.../aarch64/sve2/acle/asm/exth_s64_z.c | 28 +++
.../aarch64/sve2/acle/asm/exth_u32_z.c | 29 +++
.../aarch64/sve2/acle/asm/exth_u64_z.c | 29 +++
.../aarch64/sve2/acle/asm/extw_s64_z.c | 28 +++
.../aarch64/sve2/acle/asm/extw_u64_z.c | 29 +++
.../aarch64/sve2/acle/asm/firstp_b16.c | 192 ++++++++++++++
.../aarch64/sve2/acle/asm/firstp_b32.c | 192 ++++++++++++++
.../aarch64/sve2/acle/asm/firstp_b64.c | 192 ++++++++++++++
.../aarch64/sve2/acle/asm/firstp_b8.c | 192 ++++++++++++++
.../aarch64/sve2/acle/asm/lastp_b16.c | 192 ++++++++++++++
.../aarch64/sve2/acle/asm/lastp_b32.c | 192 ++++++++++++++
.../aarch64/sve2/acle/asm/lastp_b64.c | 192 ++++++++++++++
.../aarch64/sve2/acle/asm/lastp_b8.c | 192 ++++++++++++++
.../aarch64/sve2/acle/asm/logb_f16_z.c | 19 ++
.../aarch64/sve2/acle/asm/logb_f32_z.c | 19 ++
.../aarch64/sve2/acle/asm/logb_f64_z.c | 19 ++
.../aarch64/sve2/acle/asm/neg_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/neg_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/neg_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/neg_s16_z.c | 29 +++
.../aarch64/sve2/acle/asm/neg_s32_z.c | 29 +++
.../aarch64/sve2/acle/asm/neg_s64_z.c | 29 +++
.../aarch64/sve2/acle/asm/neg_s8_z.c | 29 +++
.../aarch64/sve2/acle/asm/not_s16_z.c | 29 +++
.../aarch64/sve2/acle/asm/not_s32_z.c | 29 +++
.../aarch64/sve2/acle/asm/not_s64_z.c | 29 +++
.../aarch64/sve2/acle/asm/not_s8_z.c | 29 +++
.../aarch64/sve2/acle/asm/not_u16_z.c | 29 +++
.../aarch64/sve2/acle/asm/not_u32_z.c | 29 +++
.../aarch64/sve2/acle/asm/not_u64_z.c | 29 +++
.../aarch64/sve2/acle/asm/not_u8_z.c | 29 +++
.../aarch64/sve2/acle/asm/qabs_s16_z.c | 29 +++
.../aarch64/sve2/acle/asm/qabs_s32_z.c | 29 +++
.../aarch64/sve2/acle/asm/qabs_s64_z.c | 29 +++
.../aarch64/sve2/acle/asm/qabs_s8_z.c | 29 +++
.../aarch64/sve2/acle/asm/qneg_s16_z.c | 29 +++
.../aarch64/sve2/acle/asm/qneg_s32_z.c | 29 +++
.../aarch64/sve2/acle/asm/qneg_s64_z.c | 29 +++
.../aarch64/sve2/acle/asm/qneg_s8_z.c | 29 +++
.../aarch64/sve2/acle/asm/rbit_s16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rbit_s32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rbit_s64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rbit_s8_z.c | 29 +++
.../aarch64/sve2/acle/asm/rbit_u16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rbit_u32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rbit_u64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rbit_u8_z.c | 29 +++
.../aarch64/sve2/acle/asm/recpe_u32_z.c | 26 ++
.../aarch64/sve2/acle/asm/recpx_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/recpx_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/recpx_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/revb_s16_z.c | 30 +++
.../aarch64/sve2/acle/asm/revb_s32_z.c | 28 +++
.../aarch64/sve2/acle/asm/revb_s64_z.c | 28 +++
.../aarch64/sve2/acle/asm/revb_u16_z.c | 28 +++
.../aarch64/sve2/acle/asm/revb_u32_z.c | 28 +++
.../aarch64/sve2/acle/asm/revb_u64_z.c | 29 +++
.../aarch64/sve2/acle/asm/revd_bf16_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_f16_z.c | 47 ++++
.../aarch64/sve2/acle/asm/revd_f32_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_f64_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_s16_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_s32_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_s64_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_s8_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_u16_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_u32_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_u64_z.c | 28 +++
.../aarch64/sve2/acle/asm/revd_u8_z.c | 28 +++
.../aarch64/sve2/acle/asm/revh_s32_z.c | 30 +++
.../aarch64/sve2/acle/asm/revh_s64_z.c | 28 +++
.../aarch64/sve2/acle/asm/revh_u32_z.c | 28 +++
.../aarch64/sve2/acle/asm/revh_u64_z.c | 30 +++
.../aarch64/sve2/acle/asm/revw_s64_z.c | 28 +++
.../aarch64/sve2/acle/asm/revw_u64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rint32x_f32.c | 59 +++++
.../aarch64/sve2/acle/asm/rint32x_f64.c | 59 +++++
.../aarch64/sve2/acle/asm/rint32z_f32.c | 59 +++++
.../aarch64/sve2/acle/asm/rint32z_f64.c | 59 +++++
.../aarch64/sve2/acle/asm/rint64x_f32.c | 59 +++++
.../aarch64/sve2/acle/asm/rint64x_f64.c | 59 +++++
.../aarch64/sve2/acle/asm/rint64z_f32.c | 59 +++++
.../aarch64/sve2/acle/asm/rint64z_f64.c | 59 +++++
.../aarch64/sve2/acle/asm/rinta_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rinta_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rinta_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rinti_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rinti_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rinti_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintm_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintm_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintm_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintn_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintn_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintn_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintp_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintp_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintp_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintx_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintx_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintx_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintz_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintz_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/rintz_f64_z.c | 29 +++
.../aarch64/sve2/acle/asm/rsqrte_u32_z.c | 28 +++
.../aarch64/sve2/acle/asm/sqrt_f16_z.c | 29 +++
.../aarch64/sve2/acle/asm/sqrt_f32_z.c | 29 +++
.../aarch64/sve2/acle/asm/sqrt_f64_z.c | 29 +++
.../aarch64/sve2/acle/general/firstp.c | 212 ++++++++++++++++
.../aarch64/sve2/acle/general/lastp.c | 212 ++++++++++++++++
gcc/testsuite/lib/target-supports.exp | 29 ++-
223 files changed, 9757 insertions(+), 168 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mul_f16_x2.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mul_f16_x4.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mul_f32_x2.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mul_f32_x4.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mul_f64_x2.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mul_f64_x4.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_f16_z.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_f32_z.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_f64_z.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s16_z.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s32_z.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s64_z.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s8_z.c
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--
2.43.0
