> That looks fine - however it shows up an oddity with the tuning structs:
many set AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS despite the
comment here saying it is meant for Neoverse-V1 only. I'll post a patch
to fix this.

Please don't remove the tuning. It's the comment that is out of date.

It's original intention was for Neoverse V1 but it turned out to be useful for 
other cores as well. We only strip it for generic tuning models.

The discussion was had internally and if you search you'll find it.

Thanks,
Tamar
________________________________
From: Wilco Dijkstra <[email protected]>
Sent: Wednesday, January 21, 2026 4:54 PM
To: Alice Carlotti <[email protected]>; [email protected] 
<[email protected]>
Cc: Richard Earnshaw <[email protected]>; Tamar Christina 
<[email protected]>; Kyrylo Tkachov <[email protected]>; Alex Coplan 
<[email protected]>; Andrew Pinski <[email protected]>; Iain 
Sandoe <[email protected]>
Subject: Re: [PATCH 3/7] aarch64: Adjust TARGET_SVE{2}

Hi Alice,

> There are two uses of TARGET_SVE{2} that need handling separately:
>
> - In aarch64_adjust_generic_arch_tuning, we are using features as a
>   proxy for tuning decisions, in which case we should treat
>   non-streaming mode with SME enabled the same as if either SVE2 or
>   streaming mode are enabled.

That looks fine - however it shows up an oddity with the tuning structs:
many set AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS despite the
comment here saying it is meant for Neoverse-V1 only. I'll post a patch
to fix this.

Overall it looks good to me. OK.

Cheers,
Wilco



gcc/ChangeLog:

        * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
        Replace TARGET_SVE{2} with explicit feature flag checks.
        * config/aarch64/aarch64.cc
        (aarch64_adjust_generic_arch_tuning): Add SME to SVE2 check.
        * config/aarch64/aarch64.h (TARGET_SVE): Adjust condition.
        (TARGET_SVE2): Ditto.


diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc
index 
ee539531d364541658bdc16b70e6df545b9205dc..11fc2a92700272ab4e81bd44484960ef1caef170
 100644
--- a/gcc/config/aarch64/aarch64-c.cc
+++ b/gcc/config/aarch64/aarch64-c.cc
@@ -196,7 +196,7 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)

   aarch64_def_or_undef (TARGET_AES && TARGET_SHA2, "__ARM_FEATURE_CRYPTO", 
pfile);
   aarch64_def_or_undef (TARGET_SIMD_RDMA, "__ARM_FEATURE_QRDMX", pfile);
-  aarch64_def_or_undef (TARGET_SVE, "__ARM_FEATURE_SVE", pfile);
+  aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE), "__ARM_FEATURE_SVE", pfile);
   cpp_undef (pfile, "__ARM_FEATURE_SVE_BITS");
   cpp_undef (pfile, "__ARM_FEATURE_SVE_VECTOR_OPERATORS");
   cpp_undef (pfile, "__ARM_FEATURE_SVE_PREDICATE_OPERATORS");
@@ -221,9 +221,9 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)
   aarch64_def_or_undef (TARGET_SVE_F64MM,
                         "__ARM_FEATURE_SVE_MATMUL_FP64", pfile);
   aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE_B16B16)
-                       && (TARGET_SVE2 || TARGET_SME2),
+                       && (AARCH64_HAVE_ISA (SVE2) || TARGET_SME2),
                         "__ARM_FEATURE_SVE_B16B16", pfile);
-  aarch64_def_or_undef (TARGET_SVE2, "__ARM_FEATURE_SVE2", pfile);
+  aarch64_def_or_undef (AARCH64_HAVE_ISA (SVE2), "__ARM_FEATURE_SVE2", pfile);
   aarch64_def_or_undef (TARGET_SVE2_AES, "__ARM_FEATURE_SVE2_AES", pfile);
   aarch64_def_or_undef (TARGET_SVE2_BITPERM,
                         "__ARM_FEATURE_SVE2_BITPERM", pfile);
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 
f150fccbe1b140b7f2f67310190ce17f532ed846..022b32ed27315078940618eaef56adee7328749d
 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -19305,7 +19305,7 @@ aarch64_adjust_generic_arch_tuning (struct tune_params 
&current_tune)
   /* Neoverse V1 is the only core that is known to benefit from
      AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS.  There is therefore no
      point enabling it for SVE2 and above.  */
-  if (TARGET_SVE2)
+  if (TARGET_SVE2 || TARGET_SME)
     current_tune.extra_tuning_flags
       &= ~AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS;
   if (!AARCH64_HAVE_ISA(V8_8A))
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 
2b7d266de1013b6c050d073086946e2d67fdd459..31ef65847381b78df3f252c314287b7bb09858ec
 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -284,11 +284,11 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE 
ATTRIBUTE_UNUSED
 /* Dot Product is an optional extension to AdvSIMD enabled through +dotprod.  
*/
 #define TARGET_DOTPROD AARCH64_HAVE_ISA (DOTPROD)

-/* SVE instructions, enabled through +sve.  */
-#define TARGET_SVE AARCH64_HAVE_ISA (SVE)
+/* SVE instructions, enabled in non-streaming mode through +sve.  */
+#define TARGET_SVE (AARCH64_HAVE_ISA (SVE) || TARGET_STREAMING)

-/* SVE2 instructions, enabled through +sve2.  */
-#define TARGET_SVE2 AARCH64_HAVE_ISA (SVE2)
+/* SVE2 instructions, enabled in non-streaming mode through +sve2.  */
+#define TARGET_SVE2 (AARCH64_HAVE_ISA (SVE2) || TARGET_STREAMING)

 /* SVE2 AES instructions, enabled through +sve2-aes.  */
 #define TARGET_SVE2_AES (AARCH64_HAVE_ISA (SVE2) \

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