[PATCH v1 0/2] RISC-V: Combine vec_duplicate + vmslt.vv to vmslt.vx on GR2VR cost

[pan2 . li]

From: Pan Li <pan2...@intel.com>

This patch would like to introduce the combine of vec_dup + vmslt.wv
into vmslt.wx on the cost value of GR2VR.  The late-combine will
take place if the cost of GR2VRlike 1, 2, 15 in test.

From:
 |   ...
 |   vmv.v.x
 | L1:
 |   vmslt.vv
 |   J L1
 |   ...

To:
 |   ...
 | L1:
 |   vmslt.vx
 |   J L1
 |   ...

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

Pan Li (2):
  RISC-V: Combine vec_duplicate + vmslt.vv to vmslt.vx on GR2VR cost
  RISC-V: Add test for vec_duplicate + vmslt.vv combine with GR2VR cost 0, 1 
and 15

 gcc/config/riscv/predicates.md                |   2 +-
 gcc/config/riscv/riscv-v.cc                   |   2 +
 .../riscv/rvv/autovec/vx_vf/vx-1-i16.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-1-i32.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-1-i64.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-1-i8.c         |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-2-i16.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-2-i32.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-2-i64.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-2-i8.c         |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-3-i16.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-3-i32.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-3-i64.c        |   1 +
 .../riscv/rvv/autovec/vx_vf/vx-3-i8.c         |   1 +
 .../riscv/rvv/autovec/vx_vf/vx_binary.h       |   1 +
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h  | 136 ++++++++++++++++++
 .../rvv/autovec/vx_vf/vx_vmslt-run-1-i16.c    |  15 ++
 .../rvv/autovec/vx_vf/vx_vmslt-run-1-i32.c    |  16 +++
 .../rvv/autovec/vx_vf/vx_vmslt-run-1-i64.c    |  15 ++
 .../rvv/autovec/vx_vf/vx_vmslt-run-1-i8.c     |  15 ++
 20 files changed, 213 insertions(+), 1 deletion(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmslt-run-1-i16.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmslt-run-1-i32.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmslt-run-1-i64.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmslt-run-1-i8.c

-- 
2.43.0