On 11/14/25 10:28 AM, Robin Dapp wrote:
This patch just performs renaming from e.g.
riscv_v_ext_vector_mode_p to
riscv_vector_mode_p
and similar.
gcc/ChangeLog:
* config/riscv/riscv-avlprop.cc (pass_avlprop::execute):
* config/riscv/riscv-protos.h (riscv_v_ext_vector_mode_p):
(riscv_v_ext_tuple_mode_p): Rename.
(riscv_v_ext_vls_mode_p): Ditto.
(riscv_vla_mode_p): To new name.
(riscv_tuple_mode_p): Ditto.
(riscv_vls_mode_p): Ditto.
* config/riscv/riscv-selftests.cc (run_const_vector_selftests):
Use new name.
(BROADCAST_TEST): Ditto.
* config/riscv/riscv-v.cc (imm_avl_p): Ditto.
(legitimize_move): Ditto.
(get_vlmul): Ditto.
(get_vlmax_rtx): Ditto.
(get_nf): Ditto.
(get_subpart_mode): Ditto.
(get_ratio): Ditto.
(get_mask_mode): Ditto.
(get_vector_mode): Ditto.
(get_tuple_mode): Ditto.
(can_find_related_mode_p): Ditto.
(cmp_lmul_le_one): Ditto.
(cmp_lmul_gt_one): Ditto.
(vls_mode_valid_p): Ditto.
* config/riscv/riscv-vector-builtins-bases.cc: Ditto.
* config/riscv/riscv-vector-builtins.cc (rvv_switcher::rvv_switcher):
Ditto.
(register_builtin_type): Ditto.
* config/riscv/riscv-vector-costs.cc (max_number_of_live_regs):
Ditto.
(compute_estimated_lmul): Ditto.
(costs::costs): Ditto.
(costs::better_main_loop_than_p): Ditto.
(costs::adjust_stmt_cost): Ditto.
* config/riscv/riscv.cc (riscv_v_ext_vector_mode_p): Ditto.
(riscv_vla_mode_p): Ditto.
(riscv_v_ext_tuple_mode_p): Ditto.
(riscv_tuple_mode_p): Ditto.
(riscv_v_ext_vls_mode_p): Ditto.
(riscv_vls_mode_p): Ditto.
(riscv_v_ext_mode_p): Ditto.
(riscv_vector_mode_p): Ditto.
(riscv_v_adjust_nunits): Ditto.
(riscv_v_adjust_bytesize): Ditto.
(riscv_classify_address): Ditto.
(riscv_legitimate_address_p): Ditto.
(riscv_address_insns): Ditto.
(riscv_const_insns): Ditto.
(riscv_legitimize_move): Ditto.
(riscv_binary_cost): Ditto.
(riscv_rtx_costs): Ditto.
(riscv_pass_vls_aggregate_in_gpr): Ditto.
(riscv_get_vector_arg): Ditto.
(riscv_pass_vls_in_vr): Ditto.
(riscv_get_arg_info): Ditto.
(riscv_pass_by_reference): Ditto.
(riscv_vector_required_min_vlen): Ditto.
(riscv_get_v_regno_alignment): Ditto.
(riscv_print_operand): Ditto.
(riscv_secondary_memory_needed): Ditto.
(riscv_hard_regno_nregs): Ditto.
(riscv_hard_regno_mode_ok): Ditto.
(riscv_modes_tieable_p): Ditto.
(riscv_can_change_mode_class): Ditto.
(riscv_vector_mode_supported_p): Ditto.
(riscv_regmode_natural_size): Ditto.
(riscv_get_mask_mode): Ditto.
(riscv_vectorize_preferred_vector_alignment): Ditto.
(riscv_vectorize_vec_perm_const): Ditto.
(get_common_costs): Ditto.
(riscv_preferred_else_value): Ditto.
Looks totally mechanical, NFC. OK.
jeff
