From: Jiajie Chen <[email protected]>
LoongArch32 does not include LDX/STX instructions, and cannot lower
(plus (reg) (reg)) pattern. Forbid ADDRESS_REG_REG and do not emit
ldx/stx.
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_valid_index_p): Check
ADDRESS_REG_REG pattern and fail in loongarch32.
(loongarch_output_move_index): assertion failed if generating
ldx/stx in loongarch32.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/array-ldx.c: Add regression test for ldx
in loongarch32.
---
gcc/config/loongarch/loongarch.cc | 4 +++-
gcc/testsuite/gcc.target/loongarch/array-ldx.c | 6 ++++++
2 files changed, 9 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/array-ldx.c
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 50c8b297e88..c1941999962 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -2363,7 +2363,8 @@ loongarch_valid_index_p (struct loongarch_address_info
*info, rtx x,
&& contains_reg_of_mode[GENERAL_REGS][GET_MODE (SUBREG_REG (index))])
index = SUBREG_REG (index);
- if (loongarch_valid_base_register_p (index, mode, strict_p))
+ /* LA32 does not provide LDX/STX. */
+ if (TARGET_64BIT && loongarch_valid_base_register_p (index, mode, strict_p))
{
info->type = ADDRESS_REG_REG;
info->offset = index;
@@ -4867,6 +4868,7 @@ loongarch_output_move_index (rtx x, machine_mode mode,
bool ldr)
}
};
+ gcc_assert (TARGET_64BIT);
return insn[ldr][index];
}
diff --git a/gcc/testsuite/gcc.target/loongarch/array-ldx.c
b/gcc/testsuite/gcc.target/loongarch/array-ldx.c
new file mode 100644
index 00000000000..108bbbe9ff6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/array-ldx.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=la32v1.0 -mabi=ilp32d -O2" } */
+long long foo(long long *arr, long long index)
+{
+ return arr[index];
+}
--
2.34.1