On Mon, Nov 03, 2025 at 01:45:14PM +0000, Alfie Richards wrote: > This does not add support for these version (and the corresponding > __ARM_FEATURE_<X> macros aren't implemented for this reason) but > accepts the command line strings and allows these to be passed on to > the assembler.
This is missing the kernel cpu feature names used by -mcpu=native, which you can find them at [1]. For the ssve-* features, this will require changes to the detection for the corresponding sve-* features. I'm currently testing a patch that will add support for strings like "svebitperm | smesbitperm". [1] https://github.com/torvalds/linux/blob/master/arch/arm64/kernel/cpuinfo.c#L50 > > Armv9.6-A is supported by the new "armv9.6-a" option and defined as > "armv9.5-a+cmpbr+lsui+occmo" > > The new extensions are: > > - fprcvt (FEAT_FPRCVT) > - lsfe (FEAT_LSFE) > - f8f32mm (FEAT_F8F32MM) > - f8f16mm (FEAT_F8F16MM) > - sme2p2 (FEAT_SME2p2) > - sve2p2 (FEAT_SVE2p2) > - sve-aes2 (FEAT_SVE_AES2) > - sve-f16f32mm (FEAT_SVE_F16F32MM) > - sve-bfscale (FEAT_SVE_BFSCALE) > - ssve-aes (FEAT_SSVE_AES) > - lsui (FEAT_LSUI) > - occmo (FEAT_OCCMO) > - pcdphint (FEAT_PCDPHINT) > - pops (FEAT_PoPS) > - ssve-bitperm (FEAT_SSVE_BitPerm) > - ssve-fexpa (FEAT_SSVE_FEXPA) > - sme-mop4 (FEAT_SME_MOP4) > - sme-tmop (FEAT_TMOP) > > gcc/ChangeLog: > > * config/aarch64/aarch64-arches.def: Add armv9.6-a. > * config/aarch64/aarch64-option-extensions.def: > (fprcvt): New cli extension option. > (lsfe): Likewise. > (f8f32mm): Likewise. > (f8f16mm): Likewise. > (sme2p2): Likewise. > (sve2p2): Likewise. > (sve-aes2): Likewise. > (sve-f16f32mm): Likewise. > (sve-bfscale): Likewise. > (ssve-aes): Likewise. > (lsui): Likewise. > (occmo): Likewise. > (pcdphint): Likewise. > (pops): Likewise. > (ssve-bitperm): Likewise. > (ssve-fexpa): Likewise. > (sme-mop4): Likewise. > (sme-tmop): Likewise. > --- > gcc/config/aarch64/aarch64-arches.def | 1 + > .../aarch64/aarch64-option-extensions.def | 36 +++++++++++++++++++ > 2 files changed, 37 insertions(+) > > diff --git a/gcc/config/aarch64/aarch64-arches.def > b/gcc/config/aarch64/aarch64-arches.def > index bf56fe9b444..5ac207180b3 100644 > --- a/gcc/config/aarch64/aarch64-arches.def > +++ b/gcc/config/aarch64/aarch64-arches.def > @@ -47,5 +47,6 @@ AARCH64_ARCH("armv9.2-a", generic_armv9_a, V9_2A, > 9, (V8_7A, V9_1A)) > AARCH64_ARCH("armv9.3-a", generic_armv9_a, V9_3A, 9, (V8_8A, > V9_2A)) > AARCH64_ARCH("armv9.4-a", generic_armv9_a, V9_4A, 9, (V8_9A, > V9_3A, SVE2p1)) > AARCH64_ARCH("armv9.5-a", generic_armv9_a, V9_5A, 9, (V9_4A, CPA, > FAMINMAX, LUT)) > +AARCH64_ARCH("armv9.6-a", generic_armv9_a, V9_6A, 9, (V9_5A, > CMPBR, LSUI, OCCMO)) > > #undef AARCH64_ARCH > diff --git a/gcc/config/aarch64/aarch64-option-extensions.def > b/gcc/config/aarch64/aarch64-option-extensions.def > index 2e03b5b75fc..47cc61a3582 100644 > --- a/gcc/config/aarch64/aarch64-option-extensions.def > +++ b/gcc/config/aarch64/aarch64-option-extensions.def > @@ -289,6 +289,42 @@ AARCH64_OPT_EXTENSION ("sme-lutv2", SME_LUTv2, (SME2), > (), (), "sme-lutv2") > > AARCH64_OPT_EXTENSION("cpa", CPA, (), (), (), "") > > +AARCH64_OPT_EXTENSION("fprcvt", FPRCVT, (FP), (), (), "") > + > +AARCH64_OPT_EXTENSION("lsfe", LSFE, (FP), (), (), "") > + > +AARCH64_OPT_EXTENSION("f8f32mm", F8F32MM, (SIMD, FP8), (), (), "") > + > +AARCH64_OPT_EXTENSION("f8f16mm", F8F16MM, (SIMD, FP8), (), (), "") > + > +AARCH64_OPT_EXTENSION("sme2p2", SME2p2, (SME2p1), (), (), "") > + > +AARCH64_OPT_EXTENSION("sve2p2", SVE2p2, (SVE2p1), (), (), "") > + > +AARCH64_OPT_EXTENSION("sve-aes2", SVE_AES2, (), (), (), "") > + > +AARCH64_OPT_EXTENSION("sve-f16f32mm", SVE_F16F32MM, (SVE), (), (), "") > + > +AARCH64_OPT_EXTENSION("sve-bfscale", SVE_BFSCALE, (), (), (), "") > + > +AARCH64_OPT_EXTENSION("ssve-aes", SSVE_AES, (SME2, SVE_AES), (), (), "") > + > +AARCH64_OPT_EXTENSION("lsui", LSUI, (), (), (), "") > + > +AARCH64_OPT_EXTENSION("occmo", OCCMO, (), (), (), "") > + > +AARCH64_OPT_EXTENSION("pcdphint", PCDPHINT, (), (), (), "") > + > +AARCH64_OPT_EXTENSION("pops", PoPS, (), (), (), "") > + > +AARCH64_OPT_EXTENSION("ssve-bitperm", SSVE_BITPERM, (SME2, SVE_BITPERM), (), > (), "") > + > +AARCH64_OPT_EXTENSION("ssve-fexpa", SSVE_FEXPA, (SME2), (), (), "") > + > +AARCH64_OPT_EXTENSION("sme-mop4", SME_MOP4, (SME2), (), (), "") > + > +AARCH64_OPT_EXTENSION("sme-tmop", SME_TMOP, (SME2), (), (), "") > + > #undef AARCH64_OPT_FMV_EXTENSION > #undef AARCH64_OPT_EXTENSION > #undef AARCH64_FMV_FEATURE > -- > 2.34.1 >
