From: Pan Li <[email protected]>
This patch would like to try to match the the unsigned
SAT_MUL form 7, aka below:
#define DEF_SAT_U_MUL_FMT_7(NT, WT) \
NT __attribute__((noinline)) \
sat_u_mul_##NT##_from_##WT##_fmt_7 (NT a, NT b) \
{ \
WT x = (WT)a * (WT)b; \
NT max = -1; \
bool overflow_p = x > (WT)(max); \
return -(NT)(overflow_p) | (NT)x; \
}
while WT is uint128_t, uint64_t, uint32_t and uint16_t, and
NT is uint64_t, uint32_t, uint16_t or uint8_t.
The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.
2. The x86 bootstrap tests.
3. The x86 fully regression tests.
Pan Li (2):
Match: Add unsigned SAT_MUL for form 7
RISC-V: Add testcase for unsigned scalar SAT_MUL form 7
gcc/match.pd | 35 +++++++++++++++++++
.../gcc.target/riscv/sat/sat_arith.h | 15 ++++++++
.../riscv/sat/sat_u_mul-8-u16-from-u128.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u16-from-u32.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u16-from-u64.rv32.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u16-from-u64.rv64.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u32-from-u128.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u32-from-u64.rv32.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u32-from-u64.rv64.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u64-from-u128.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u8-from-u128.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u8-from-u16.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u8-from-u32.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u8-from-u64.rv32.c | 11 ++++++
.../riscv/sat/sat_u_mul-8-u8-from-u64.rv64.c | 11 ++++++
.../riscv/sat/sat_u_mul-run-8-u16-from-u128.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u16-from-u32.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u16-from-u64.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u32-from-u128.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u32-from-u64.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u64-from-u128.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u8-from-u128.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u8-from-u16.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u8-from-u32.c | 16 +++++++++
.../riscv/sat/sat_u_mul-run-8-u8-from-u64.c | 16 +++++++++
25 files changed, 353 insertions(+)
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u16-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u16-from-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u16-from-u64.rv32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u16-from-u64.rv64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u32-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u32-from-u64.rv32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u32-from-u64.rv64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u64-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u8-from-u128.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u8-from-u16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u8-from-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u8-from-u64.rv32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-8-u8-from-u64.rv64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u16-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u16-from-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u16-from-u64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u32-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u32-from-u64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u64-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u8-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u8-from-u16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u8-from-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-8-u8-from-u64.c
--
2.43.0
