Changes from V2:
* Remove the part that implicitly includes -mips16.
* Use isa_rev=2 instead of >=2.

MIPS16e2 ASE is a superset of MIPS16e ASE, which is again a superset
of MIPS16 ASE. Later, all of them are forbidden in Release 6.

Check if mips_isa_rev <= 5 when -mips16 is effective and >= 2
when -mmips16e2 is effective.

gcc/ChangeLog:
        * config/mips/mips.cc(mips_option_override):Add conditions
        for use of the -mmips16e2 and -mips16 option.

gcc/testsuite/ChangeLog:
        * gcc.target/mips/mips16e2-cache.c: Use isa_rev=2 instead of
        -mips32r2 option.
        * gcc.target/mips/mips16e2-cmov.c: Add isa_rev=2 option.
        * gcc.target/mips/mips16e2-gp.c: Same as above.
        * gcc.target/mips/mips16e2.c: Same as above.

Co-developed-by: Rong Zhang <[email protected]>
Signed-off-by: Rong Zhang <[email protected]>
---
 gcc/config/mips/mips.cc                        | 9 +++++++++
 gcc/testsuite/gcc.target/mips/mips16e2-cache.c | 2 +-
 gcc/testsuite/gcc.target/mips/mips16e2-cmov.c  | 2 +-
 gcc/testsuite/gcc.target/mips/mips16e2-gp.c    | 2 +-
 gcc/testsuite/gcc.target/mips/mips16e2.c       | 2 +-
 5 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 492fa285477..8b22fa06f2e 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -20654,6 +20654,15 @@ mips_option_override (void)
              "-mcompact-branches=never");
     }
 
+  /* MIPS16* ASE is forbidden in Release 6, so -mips16 is not available
+     for MIPS R6 onwards.  */
+  if ((mips_base_compression_flags & MASK_MIPS16) && mips_isa_rev >= 6)
+    error ("MIPS16* ASE is forbidden in Release 6");
+
+  /* Make sure that the user use Release[2,5] when using -mmips16e2.  */
+  if (TARGET_MIPS16E2 && mips_isa_rev < 2)
+    error ("%<-mmips16e2%> requires Release[2,5]");
+
   /* Require explicit relocs for MIPS R6 onwards.  This enables simplification
      of the compact branch and jump support through the backend.  */
   if (!TARGET_EXPLICIT_RELOCS && mips_isa_rev >= 6)
diff --git a/gcc/testsuite/gcc.target/mips/mips16e2-cache.c 
b/gcc/testsuite/gcc.target/mips/mips16e2-cache.c
index dcc39b580f5..1915ac47140 100644
--- a/gcc/testsuite/gcc.target/mips/mips16e2-cache.c
+++ b/gcc/testsuite/gcc.target/mips/mips16e2-cache.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mno-abicalls -mgpopt -G8 -mabi=32 -mips32r2 -mips16 
-mmips16e2" } */
+/* { dg-options "-mno-abicalls -mgpopt -G8 -mabi=32 isa_rev=2 -mips16 
-mmips16e2" } */
 /* { dg-skip-if "naming registers makes this a code quality test" { *-*-* } { 
"-O0" } { "" } } */
 
 /* Test cache.  */
diff --git a/gcc/testsuite/gcc.target/mips/mips16e2-cmov.c 
b/gcc/testsuite/gcc.target/mips/mips16e2-cmov.c
index 129ea23b65b..8d7d10da1d1 100644
--- a/gcc/testsuite/gcc.target/mips/mips16e2-cmov.c
+++ b/gcc/testsuite/gcc.target/mips/mips16e2-cmov.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mno-abicalls -mgpopt -G8 -mabi=32 -mips16 -mmips16e2 
-mbranch-cost=2" } */
+/* { dg-options "-mno-abicalls -mgpopt -G8 -mabi=32 isa_rev=2 -mips16 
-mmips16e2 -mbranch-cost=2" } */
 /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
 
 /* Test MOVN.  */
diff --git a/gcc/testsuite/gcc.target/mips/mips16e2-gp.c 
b/gcc/testsuite/gcc.target/mips/mips16e2-gp.c
index 7955472bde3..fd6a4f6cc3e 100644
--- a/gcc/testsuite/gcc.target/mips/mips16e2-gp.c
+++ b/gcc/testsuite/gcc.target/mips/mips16e2-gp.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mno-abicalls -mgpopt -G8 -mabi=32 -mips16 -mmips16e2" } */
+/* { dg-options "-mno-abicalls -mgpopt -G8 -mabi=32 isa_rev=2 -mips16 
-mmips16e2" } */
 /* { dg-skip-if "per-function expected output" { *-*-* } { "-flto" } { "" } } 
*/
  
 /* Generate GP-relative ADDIU.  */
diff --git a/gcc/testsuite/gcc.target/mips/mips16e2.c 
b/gcc/testsuite/gcc.target/mips/mips16e2.c
index 166aa742268..d23236c8ef5 100644
--- a/gcc/testsuite/gcc.target/mips/mips16e2.c
+++ b/gcc/testsuite/gcc.target/mips/mips16e2.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mno-abicalls -mgpopt -G8 -mabi=32 -mips16 -mmips16e2" } */
+/* { dg-options "-mno-abicalls -mgpopt -G8 -mabi=32 isa_rev=2 -mips16 
-mmips16e2" } */
 /* { dg-skip-if "per-function expected output" { *-*-* } { "-flto" } { "" } } 
*/
  
 /* ANDI is a two operand instruction.  Hence, it won't be generated if src and
-- 
2.51.0

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