Seems like I also implement that on qemu many years ago: https://github.com/kito-cheng/riscv-qemu/tree/q-ext-dev
Feel free to take it On Thu, Sep 11, 2025 at 9:54 PM Liao Shihua <shi...@iscas.ac.cn> wrote: > > Ok,I will try to implement it in QEMU and send the second version of > the patch. > > 在 2025/9/11 21:18, Jeff Law 写道: > > > > > > On 9/11/25 1:28 AM, Kito Cheng wrote: > >>> This Patch implements the Quad-precision Float extension for RISC-V, > >>> based on > >>> Kito's work five years ago in > >>> https://github.com/riscvarchive/riscv-gcc/tree/q-ext > >> > >> Thanks for bringing this back, I almost forgot this still has not > >> merged yet. > > Note that I don't think we have a way to test this as QEMU doesn't > > support 128 bit FP yet other than load/store. > > > > Jeff >