These patterns had one (if_then_else ...) nested within another.
The outer if_then_else had SImode, which means that the "then"
and "else" should also be SImode (unless they're const_ints).
However, the inner if_then_else was modeless, which led to an
assertion failure when trying to take a subreg of it.

Bootstrapped & regression-tested on gcc120 with --with-cpu=native,
pushed as pre-approved.

Richard


gcc/
        PR target/121501
        * config/rs6000/rs6000.md (cmprb, setb_signed, setb_unsigned)
        (cmprb2, cmpeqb): Add missing modes to nested if_then_elses.
---
 gcc/config/rs6000/rs6000.md | 40 ++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e31ee40aa87..04a6c0f7461 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -15665,10 +15665,10 @@ (define_expand "cmprb"
        (if_then_else:SI (lt (match_dup 3)
                             (const_int 0))
                         (const_int -1)
-                        (if_then_else (gt (match_dup 3)
-                                          (const_int 0))
-                                      (const_int 1)
-                                      (const_int 0))))]
+                        (if_then_else:SI (gt (match_dup 3)
+                                             (const_int 0))
+                                         (const_int 1)
+                                         (const_int 0))))]
   "TARGET_P9_MISC"
 {
   operands[3] = gen_reg_rtx (CCmode);
@@ -15703,10 +15703,10 @@ (define_insn "setb_signed"
         (if_then_else:SI (lt (match_operand:CC 1 "cc_reg_operand" "y")
                              (const_int 0))
                          (const_int -1)
-                         (if_then_else (gt (match_dup 1)
-                                           (const_int 0))
-                                       (const_int 1)
-                                       (const_int 0))))]
+                         (if_then_else:SI (gt (match_dup 1)
+                                              (const_int 0))
+                                          (const_int 1)
+                                          (const_int 0))))]
   "TARGET_P9_MISC"
   "setb %0,%1"
   [(set_attr "type" "logical")])
@@ -15716,10 +15716,10 @@ (define_insn "setb_unsigned"
         (if_then_else:SI (ltu (match_operand:CCUNS 1 "cc_reg_operand" "y")
                              (const_int 0))
                          (const_int -1)
-                         (if_then_else (gtu (match_dup 1)
-                                           (const_int 0))
-                                       (const_int 1)
-                                       (const_int 0))))]
+                         (if_then_else:SI (gtu (match_dup 1)
+                                               (const_int 0))
+                                          (const_int 1)
+                                          (const_int 0))))]
   "TARGET_P9_MISC"
   "setb %0,%1"
   [(set_attr "type" "logical")])
@@ -15751,10 +15751,10 @@ (define_expand "cmprb2"
        (if_then_else:SI (lt (match_dup 3)
                             (const_int 0))
                         (const_int -1)
-                        (if_then_else (gt (match_dup 3)
-                                          (const_int 0))
-                                      (const_int 1)
-                                      (const_int 0))))]
+                        (if_then_else:SI (gt (match_dup 3)
+                                             (const_int 0))
+                                         (const_int 1)
+                                         (const_int 0))))]
   "TARGET_P9_MISC"
 {
   operands[3] = gen_reg_rtx (CCmode);
@@ -15807,10 +15807,10 @@ (define_expand "cmpeqb"
        (if_then_else:SI (lt (match_dup 3)
                             (const_int 0))
                         (const_int -1)
-                        (if_then_else (gt (match_dup 3)
-                                          (const_int 0))
-                                      (const_int 1)
-                                      (const_int 0))))]
+                        (if_then_else:SI (gt (match_dup 3)
+                                             (const_int 0))
+                                         (const_int 1)
+                                         (const_int 0))))]
   "TARGET_P9_MISC && TARGET_64BIT"
 {
   operands[3] = gen_reg_rtx (CCmode);
-- 
2.43.0

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