This patchset LGTM except 4/7, you can go ahead to commit 1/7~3/7 if
you are OK with that :)

On Tue, Aug 12, 2025 at 4:18 PM Kuan-Lin Chen <ru...@andestech.com> wrote:
>
> Changes since v2:
> [PATCH 1/7]
>   Moved andes test cases to subdir gcc.target/riscv/xandes.
>
> [PATCH 2/7]
>   Moved andes test cases to subdir gcc.target/riscv/xandes.
>   Replaced "equality_operator" with "any_eq".
>   Added code_attr "cs" for "any_eq".
>   Fixed comment for "*nds_bfoz<mode>4".
>   Modified builtins of the string extension (ffb, ffzmism, ffmism and 
> nds_flmism).
>   Add "-mabi" for some test cases.
>
> [PATCH 3/7]
>   Moved andes test cases to subdir gcc.target/riscv/xandes.
>   Used "extendbfsf" to handle nds_fcvt_bf16_s.
>   Used "truncsfbf2" to handle nds_fcvt_bf16_s.
>   Add "-mabi" for test cases.
>
> [PATCH 4/7] ~ [PATCH 7/7]
> Add "-mabi" for test cases.
>
> Thanks for your review.
>
> Kuan-Lin Chen (7):
>   RISC-V: Add basic XAndes vendor extension support.
>   RISC-V: Add support for the XAndesperf ISA extension.
>   RISC-V: Add support for the XAndesbfhcvt ISA extension.
>   RISC-V: Add support for the XAndesvbfhcvt ISA extension.
>   RISC-V: Add support for the XAndesvsintload ISA extension.
>   RISC-V: Add support for the XAndesvpackfph ISA extension.
>   RISC-V: Add support for the XAndesvdot ISA extension.
>
>  gcc/common/config/riscv/riscv-common.cc       |   3 +
>  gcc/config.gcc                                |   4 +-
>  .../riscv/andes-vector-builtins-bases.cc      | 189 ++++++++
>  .../riscv/andes-vector-builtins-bases.h       |  42 ++
>  .../riscv/andes-vector-builtins-functions.def |  65 +++
>  gcc/config/riscv/andes-vector.md              | 163 +++++++
>  gcc/config/riscv/andes.def                    |  14 +
>  gcc/config/riscv/andes.md                     | 429 ++++++++++++++++++
>  gcc/config/riscv/andes_vector.h               |  32 ++
>  gcc/config/riscv/constraints.md               |  10 +
>  gcc/config/riscv/genrvv-type-indexer.cc       |   6 +-
>  gcc/config/riscv/iterators.md                 |  15 +
>  gcc/config/riscv/predicates.md                |  42 ++
>  gcc/config/riscv/riscv-builtins.cc            |   9 +
>  gcc/config/riscv/riscv-ext-andes.def          | 100 ++++
>  gcc/config/riscv/riscv-ext.def                |   1 +
>  gcc/config/riscv/riscv-ext.opt                |  15 +
>  gcc/config/riscv/riscv-ftypes.def             |   3 +
>  .../riscv/riscv-vector-builtins-types.def     |  44 ++
>  gcc/config/riscv/riscv-vector-builtins.cc     | 103 +++++
>  gcc/config/riscv/riscv-vector-builtins.def    |   4 +
>  gcc/config/riscv/riscv-vector-builtins.h      |  20 +
>  gcc/config/riscv/riscv.cc                     |  32 ++
>  gcc/config/riscv/riscv.md                     |  35 +-
>  gcc/config/riscv/t-riscv                      |  18 +-
>  gcc/config/riscv/vector-iterators.md          |  38 +-
>  gcc/config/riscv/vector.md                    |   1 +
>  gcc/doc/riscv-ext.texi                        |  24 +
>  gcc/testsuite/gcc.target/riscv/riscv.exp      |   2 +
>  gcc/testsuite/gcc.target/riscv/rvv/rvv.exp    |  12 +
>  .../riscv/rvv/xandesvector/nds_vfwcvt.c       |  37 ++
>  .../non-policy/non-overloaded/nds_vd4dots.c   | 132 ++++++
>  .../non-policy/non-overloaded/nds_vd4dotsu.c  | 132 ++++++
>  .../non-policy/non-overloaded/nds_vd4dotu.c   | 132 ++++++
>  .../non-policy/non-overloaded/nds_vfpmadb.c   | 103 +++++
>  .../non-policy/non-overloaded/nds_vfpmadt.c   | 103 +++++
>  .../non-policy/non-overloaded/nds_vln8.c      |  62 +++
>  .../non-policy/overloaded/nds_vd4dots.c       | 132 ++++++
>  .../non-policy/overloaded/nds_vd4dotsu.c      | 132 ++++++
>  .../non-policy/overloaded/nds_vd4dotu.c       | 132 ++++++
>  .../non-policy/overloaded/nds_vfpmadb.c       | 103 +++++
>  .../non-policy/overloaded/nds_vfpmadt.c       | 103 +++++
>  .../non-policy/overloaded/nds_vln8.c          |  34 ++
>  .../policy/non-overloaded/nds_vd4dots.c       | 258 +++++++++++
>  .../policy/non-overloaded/nds_vd4dotsu.c      | 258 +++++++++++
>  .../policy/non-overloaded/nds_vd4dotu.c       | 258 +++++++++++
>  .../policy/non-overloaded/nds_vfpmadb.c       | 199 ++++++++
>  .../policy/non-overloaded/nds_vfpmadt.c       | 199 ++++++++
>  .../policy/non-overloaded/nds_vln8.c          | 118 +++++
>  .../policy/overloaded/nds_vd4dots.c           | 258 +++++++++++
>  .../policy/overloaded/nds_vd4dotsu.c          | 258 +++++++++++
>  .../policy/overloaded/nds_vd4dotu.c           | 258 +++++++++++
>  .../policy/overloaded/nds_vfpmadb.c           | 199 ++++++++
>  .../policy/overloaded/nds_vfpmadt.c           | 199 ++++++++
>  .../xandesvector/policy/overloaded/nds_vln8.c | 118 +++++
>  .../gcc.target/riscv/xandes/xandes-predef-1.c |  14 +
>  .../gcc.target/riscv/xandes/xandes-predef-2.c |  14 +
>  .../gcc.target/riscv/xandes/xandes-predef-3.c |  14 +
>  .../gcc.target/riscv/xandes/xandes-predef-4.c |  14 +
>  .../gcc.target/riscv/xandes/xandes-predef-5.c |  14 +
>  .../gcc.target/riscv/xandes/xandes-predef-6.c |  14 +
>  .../gcc.target/riscv/xandes/xandesbfhcvt-1.c  |  11 +
>  .../gcc.target/riscv/xandes/xandesbfhcvt-2.c  |  11 +
>  .../gcc.target/riscv/xandes/xandesperf-1.c    |  13 +
>  .../gcc.target/riscv/xandes/xandesperf-10.c   |  32 ++
>  .../gcc.target/riscv/xandes/xandesperf-11.c   |  32 ++
>  .../gcc.target/riscv/xandes/xandesperf-2.c    |  13 +
>  .../gcc.target/riscv/xandes/xandesperf-3.c    |  11 +
>  .../gcc.target/riscv/xandes/xandesperf-4.c    |  11 +
>  .../gcc.target/riscv/xandes/xandesperf-5.c    |  11 +
>  .../gcc.target/riscv/xandes/xandesperf-6.c    |  18 +
>  .../gcc.target/riscv/xandes/xandesperf-7.c    |  22 +
>  .../gcc.target/riscv/xandes/xandesperf-8.c    |  26 ++
>  .../gcc.target/riscv/xandes/xandesperf-9.c    |  31 ++
>  74 files changed, 5701 insertions(+), 17 deletions(-)
>  create mode 100644 gcc/config/riscv/andes-vector-builtins-bases.cc
>  create mode 100644 gcc/config/riscv/andes-vector-builtins-bases.h
>  create mode 100644 gcc/config/riscv/andes-vector-builtins-functions.def
>  create mode 100644 gcc/config/riscv/andes-vector.md
>  create mode 100644 gcc/config/riscv/andes.def
>  create mode 100644 gcc/config/riscv/andes.md
>  create mode 100644 gcc/config/riscv/andes_vector.h
>  create mode 100644 gcc/config/riscv/riscv-ext-andes.def
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/nds_vfwcvt.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dots.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotsu.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotu.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadb.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadt.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vln8.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dots.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotsu.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotu.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadb.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadt.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vln8.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dots.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotsu.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotu.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadb.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadt.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vln8.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dots.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotsu.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotu.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadb.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadt.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vln8.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-1.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-2.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-3.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-4.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-5.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-6.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-1.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-2.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-1.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-10.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-11.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-2.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-3.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-4.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-5.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-6.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-7.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-8.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/xandes/xandesperf-9.c
>
> --
> 2.34.1
>

Reply via email to