Uros Bizjak <ubiz...@gmail.com> writes: > On Tue, Aug 5, 2025 at 1:32 PM Richard Sandiford > <richard.sandif...@arm.com> wrote: >> It's coming from: >> >> (define_split >> [(set (match_operand:SWI 0 "register_operand") >> (any_rotate:SWI >> (match_operand:SWI 1 "const_int_operand") >> (subreg:QI >> (and >> (match_operand 2 "int248_register_operand") >> (match_operand 3 "const_int_operand")) 0)))] >> "(INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode) - 1)) >> == GET_MODE_BITSIZE (<MODE>mode) - 1" >> [(set (match_dup 4) (match_dup 1)) >> (set (match_dup 0) >> (any_rotate:SWI (match_dup 4) >> (subreg:QI >> (and:SI (match_dup 2) (match_dup 3)) 0)))] >> "operands[4] = gen_reg_rtx (<MODE>mode);") >> >> which matches any mode of (and ...) on input, but hard-codes (and:SI ...) >> in the output. This causes an ICE if the incoming (and ...) is DImode >> rather than SImode. >> >> The patch below seems to fix it. > > I am testing a slightly adjusted patch: > > --cut here-- > i386: Fix invalid RTX mode in the unnamed rotate splitter. > > The following splitter from the commit r11-5747: > > (define_split > [(set (match_operand:SWI 0 "register_operand") > (any_rotate:SWI > (match_operand:SWI 1 "const_int_operand") > (subreg:QI > (and > (match_operand 2 "int248_register_operand") > (match_operand 3 "const_int_operand")) 0)))] > "(INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode) - 1)) > == GET_MODE_BITSIZE (<MODE>mode) - 1" > [(set (match_dup 4) (match_dup 1)) > (set (match_dup 0) > (any_rotate:SWI (match_dup 4) > (subreg:QI > (and:SI (match_dup 2) (match_dup 3)) 0)))] > "operands[4] = gen_reg_rtx (<MODE>mode);") > > matches any mode of (and ...) on input, but hard-codes (and:SI ...) > in the output. This causes an ICE if the incoming (and ...) is DImode > rather than SImode. > > Co-developed-by: Richard Sandiford <richard.sandif...@arm.com> > > PR target/96226 > > gcc/ChangeLog: > > * config/i386/predicates.md (and_operator): New operator. > * config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask): > Use and_operator to match AND RTX and use its mode > in the split pattern. > --cut here-- > > that fixes the mentioned issue from PR96226. > > I plan to commit this patch in a couple of hours, so IMO the way will > be cleared for Richard's simplify-rtx.cc patch to land.
Thanks. The simplify-rtx.cc patch regressed aarch64, so I tested an alternative overnight. It passed testing on both x86 and aarch64, but there's another tweak I'd like to make too. The tweaked version also passes testing on aarch64, will test it later on x86. Richard
