> Is that for the case where the target cannot do a widen_mul?  Or why
> is this important?

No, the below pattern will generate mul/widen_mul depending on types.

679 #define DEF_SAT_U_MUL_FMT_1(NT, WT)             \
680 NT __attribute__((noinline))                    \
681 sat_u_mul_##NT##_from_##WT##_fmt_1 (NT a, NT b) \
682 {                                               \
683   WT x = (WT)a * (WT)b;                         \
684   NT max = -1;                                  \
685   if (x > (WT)(max))                            \
686     return max;                                 \
687   else                                          \
688     return (NT)x;                               \
689 }

If DEF_SAT_U_MUL_FMT_1(uint32_t, uint128_t), then widen_mul
If DEF_SAT_U_MUL_FMT_1(uint32_t, uint64_t), then mul.

And the layout not that the same between the widen_mul and mul, thus I added 
the mul based part,
to make sure the other type combines are covered.

Pan

-----Original Message-----
From: Richard Biener <richard.guent...@gmail.com> 
Sent: Monday, July 28, 2025 6:51 PM
To: Li, Pan2 <pan2...@intel.com>
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; 
jeffreya...@gmail.com; rdapp....@gmail.com; Chen, Ken <ken.c...@intel.com>; 
Liu, Hongtao <hongtao....@intel.com>
Subject: Re: [PATCH v1 0/2] Add mul based unsigned SAT_MUL for form 1

On Sat, Jul 26, 2025 at 3:13 PM <pan2...@intel.com> wrote:
>
> From: Pan Li <pan2...@intel.com>
>
> This patch series would like to support the unsigned SAT_MUL with
> the help of mul, instead of the widen_mul.  Aka:

Is that for the case where the target cannot do a widen_mul?  Or why
is this important?

Richard.

> NT __attribute__((noinline))
> sat_u_mul_##NT##_fmt_1 (NT a, NT b)
> {
>   uint64_t x = (uint64_t)a * (uint64_t)b;
>   NT max = -1;
>   if (x > (uint64_t)(max))
>     return max;
>   else
>     return (NT)x;
> }
>
> Take NT as uint32_t as example, we will have:
>
> Before this patch:
>   15   |   <bb 2> [local count: 1073741824]:
>   16   |   _1 = (long unsigned int) a_4(D);
>   17   |   _2 = (long unsigned int) b_5(D);
>   18   |   x_6 = _1 * _2;
>   19   |   _7 = MIN_EXPR <x_6, 4294967295>;
>   20   |   _3 = (uint32_t) _7;
>   21   |   return _3;
>
> After this patch:
>    9   |   <bb 2> [local count: 1073741824]:
>   10   |   _3 = .SAT_MUL (a_4(D), b_5(D)); [tail call]
>   11   |   return _3;
>
> The below test suites are passed for this patch:
> 1. The rv64gcv fully regression tests.
> 2. The rv32gcv regression tests for sat_mul.
> 3. The x86 bootstrap tests.
> 4. The x86 fully regression tests.
>
> Pan Li (2):
>   Match: Introduce mul based pattern for unsigned SAT_MUL
>   RISC-V: Add test cases for mul based unsigned scalar SAT_MUL
>
>  gcc/match.pd                                     | 12 ++++++++++++
>  .../riscv/sat/sat_u_mul-1-u16-from-u32.c         | 11 +++++++++++
>  .../riscv/sat/sat_u_mul-1-u8-from-u16.c          | 11 +++++++++++
>  .../riscv/sat/sat_u_mul-1-u8-from-u32.c          | 11 +++++++++++
>  .../riscv/sat/sat_u_mul-2-u16-from-u64.c         | 11 +++++++++++
>  .../riscv/sat/sat_u_mul-2-u32-from-u64.c         | 11 +++++++++++
>  .../riscv/sat/sat_u_mul-2-u8-from-u64.c          | 11 +++++++++++
>  .../riscv/sat/sat_u_mul-run-1-u16-from-u32.c     | 16 ++++++++++++++++
>  .../riscv/sat/sat_u_mul-run-1-u16-from-u64.c     |  2 +-
>  .../riscv/sat/sat_u_mul-run-1-u32-from-u64.c     |  2 +-
>  .../riscv/sat/sat_u_mul-run-1-u8-from-u16.c      | 16 ++++++++++++++++
>  .../riscv/sat/sat_u_mul-run-1-u8-from-u32.c      | 16 ++++++++++++++++
>  .../riscv/sat/sat_u_mul-run-1-u8-from-u64.c      |  2 +-
>  13 files changed, 129 insertions(+), 3 deletions(-)
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u32.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u16.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u32.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u16-from-u64.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u32-from-u64.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u8-from-u64.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u32.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u16.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u32.c
>
> --
> 2.43.0
>

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