Thanks for the update.

Like in your other email, there are still formatting issues.

Here is the version I applied manually and used in CI.

Christophe

On Thu, 10 Jul 2025 at 01:46, Matt Parks <matt.pa...@go-aps.com> wrote:
>
> This patch fixes PR117366:
> arm thumb1 epilogue size optimizer violates -ffixed-r4.
>
> gcc/ChangeLog:
>        PR target/117366
>         * arm.cc (thumb1_extra_regs_pushed): Take fixed regs into account.
>
> ---
> diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
> index bde06f3fa86..7bb829dbb04 100644
> --- a/gcc/config/arm/arm.cc
> +++ b/gcc/config/arm/arm.cc
> @@ -26746,8 +26746,9 @@ thumb1_extra_regs_pushed (arm_stack_offsets *offsets, 
> bool for_prologue)
>        live_regs_mask >>= reg_base;
>      }
> -  while (reg_base + n_free < 8 && !(live_regs_mask & 1)
> -        && (for_prologue || call_used_or_fixed_reg_p (reg_base + n_free)))
> +  while (reg_base + n_free <= LAST_LO_REGNUM && !(live_regs_mask & 1)
> +        && (for_prologue || (call_used_or_fixed_reg_p (reg_base + n_free)
> +                              && !fixed_regs[reg_base + n_free])))
>      {
>        live_regs_mask >>= 1;
>        n_free++;
> diff --git a/gcc/testsuite/gcc.target/arm/pr117366.c 
> b/gcc/testsuite/gcc.target/arm/pr117366.c
> new file mode 100644
> index 00000000000..b23d114381b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/pr117366.c
> @@ -0,0 +1,14 @@
> +
> +/* { dg-do compile } */
> +/* { dg-options "-Os -ffixed-r4 -ffixed-r5 -ffixed-r6 -ffixed-r7" } */
> +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
> +/* { dg-add-options arm_arch_v5t_thumb } */
> +void func(void *, void *, void *, int, int);
> +
> +int bad_func(void) {
> +   int a, b, c;
> +   func(&a, &b, &c, 1, 2);
> +   return b;
> +}
> +
> +/* { dg-final { scan-assembler-not "pop.*r\[4567\]" } } */
From 5cfeb6f016e4d5316848ee1d39e48f9bdac476df Mon Sep 17 00:00:00 2001
From: Matt Parks <matt.pa...@go-aps.com>
Date: Thu, 10 Jul 2025 10:51:26 +0000
Subject: [PATCH v3] arm: fix thumb1 size-optimized function prolog violates
 -ffixed-rX [PR117366]

This patch fixes PR117366:
arm thumb1 epilogue size optimizer violates -ffixed-r4.

gcc/ChangeLog:
	PR target/117366
	* config/arm/arm.cc (thumb1_extra_regs_pushed): Take fixed regs
	into account.

gcc/testsuite/ChangeLog:
	PR target/117366
	* gcc.target/arm/pr117366.c: New test.
---
 gcc/config/arm/arm.cc                   |  3 ++-
 gcc/testsuite/gcc.target/arm/pr117366.c | 13 +++++++++++++
 2 files changed, 15 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/arm/pr117366.c

diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 5d93fe6edc7..71ea3103956 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -26749,7 +26749,8 @@ thumb1_extra_regs_pushed (arm_stack_offsets *offsets, bool for_prologue)
     }
 
   while (reg_base + n_free < 8 && !(live_regs_mask & 1)
-	 && (for_prologue || call_used_or_fixed_reg_p (reg_base + n_free)))
+	 && (for_prologue || (call_used_or_fixed_reg_p (reg_base + n_free)
+			      && !fixed_regs[reg_base + n_free])))
     {
       live_regs_mask >>= 1;
       n_free++;
diff --git a/gcc/testsuite/gcc.target/arm/pr117366.c b/gcc/testsuite/gcc.target/arm/pr117366.c
new file mode 100644
index 00000000000..f994f098c00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr117366.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-Os -ffixed-r4 -ffixed-r5 -ffixed-r6 -ffixed-r7" } */
+/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */
+/* { dg-add-options arm_arch_v5t_thumb } */
+void func(void *, void *, void *, int, int);
+
+int bad_func(void) {
+   int a, b, c;
+   func(&a, &b, &c, 1, 2);
+   return b;
+}
+
+/* { dg-final { scan-assembler-not "pop.*r\[4567\]" } } */
-- 
2.34.1

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