Hi Christophe,
On 2025-07-09 17:31, Christophe Lyon wrote:
On Wed, 9 Jul 2025 at 10:25, Torbjörn SVENSSON
<torbjorn.svens...@foss.st.com> wrote:
Ok for trunk and releases/gcc-15?
Changes since v1:
- Removed the acceptance of LDR as it's only generated without
r15-7373-g5163cf2ae14. Since
I'm currently looking into gcc-14 release, and made the patch in that scope,
I ran it on
trunk to ensure no new failures, but it's not actually needed.
As I said in the previous version of your patch, the test passes on
trunk in the various configurations we test.
Do you mean that you see it failing in gcc-14, and this patch is what
you use in gcc-14 and would like to apply to trunk and gcc-15 even
though the test passes there?
Yes, I see it failing on gcc-14 and since we are allowing 2 out of the 3 variations where
the 'and' instruction can be placed, but are missing the 3rd variation (the one generated
on gcc-14), I would say that it's desired to have this on trunk and gcc-15 too to not
risk having another "failure" due to some scheduling randomization.
Call it what you want, but I'd like to actually have tests that fail when there
is something wrong, not when 2 instructions swap place that has no impact on
either size, speed or overall functionality. :)
Example on gcc-14:
$ arm-none-eabi-gcc gcc.target/arm/unsigned-extend-2.c -mcpu=cortex-a7
-mfloat-abi=soft -O2 -S -o -
.cpu cortex-a7
.arch armv7-a
.arch_extension virt
.arch_extension idiv
.arch_extension sec
.arch_extension mp
.fpu softvfp
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 1
.eabi_attribute 30, 2
.eabi_attribute 34, 1
.eabi_attribute 18, 4
.file "unsigned-extend-2.c"
.text
.align 2
.global foo
.syntax unified
.arm
.type foo, %function
foo:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r3, #8
.L2:
and r0, r1, r0, lsr #1
sub r3, r3, #1
ands r3, r3, #255
bne .L2
bx lr
.size foo, .-foo
.ident "GCC: (Arm GNU Toolchain 14.3.Rel1 (Build arm-14.174)) 14.3.1
20250623"
Let me know what you think. :)
Kind regards,
Torbjörn
Thanks,
Christophe
--
The scheduler allows the `and` instruction to be placed at 3 different
locations. Update the function body to contain all 3 locations.
gcc/testsuite/ChangeLog:
* gcc.target/arm/unsigned-extend-2.c: Add missing potential
locations for `and` instruction.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
---
gcc/testsuite/gcc.target/arm/unsigned-extend-2.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
b/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
index d9f95a14277..15bc5a4c14d 100644
--- a/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
+++ b/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
@@ -7,15 +7,19 @@
** foo:
** movs (r[0-9]+), #8
** (
+** (
+** and r0, r1, r0, lsr #1
** subs \1, \1, #1
** ands \1, \1, #255
-** and r0, r1, r0, lsr #1
-** bne .L[0-9]+
-** bx lr
** |
** subs \1, \1, #1
** and r0, r1, r0, lsr #1
** ands \1, \1, #255
+** |
+** subs \1, \1, #1
+** ands \1, \1, #255
+** and r0, r1, r0, lsr #1
+** )
** bne .L[0-9]+
** bx lr
** |
--
2.25.1
