On Tue, 8 Jul 2025 at 17:17, Torbjörn SVENSSON
<torbjorn.svens...@foss.st.com> wrote:
>
> Ok for trunk and releases/gcc-15?
>
> --
>
> The scheduler allows the `and` instruction to be placed at 3 different
> locations. Update the function body to contain all 3 locations.
> Also, armv8.1-m.main can use `ldr` instead of `pop` to return.
>
Hi Torbjorn,
Could you give more details about when these changes are needed ? What
options are you using?
FWIW the test passes CI when targeting cortex-m55 /
-march=armv8.1-m.main+mve.fp+fp.dp
Thanks,
Christophe
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/unsigned-extend-2.c: Add missing potential
> locations for `and` instruction and adjust return instruction.
>
> Signed-off-by: Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
> ---
> gcc/testsuite/gcc.target/arm/unsigned-extend-2.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
> b/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
> index d9f95a14277..e46573cf39d 100644
> --- a/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
> +++ b/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
> @@ -7,15 +7,19 @@
> ** foo:
> ** movs (r[0-9]+), #8
> ** (
> +** (
> +** and r0, r1, r0, lsr #1
> ** subs \1, \1, #1
> ** ands \1, \1, #255
> -** and r0, r1, r0, lsr #1
> -** bne .L[0-9]+
> -** bx lr
> ** |
> ** subs \1, \1, #1
> ** and r0, r1, r0, lsr #1
> ** ands \1, \1, #255
> +** |
> +** subs \1, \1, #1
> +** ands \1, \1, #255
> +** and r0, r1, r0, lsr #1
> +** )
> ** bne .L[0-9]+
> ** bx lr
> ** |
> @@ -23,7 +27,11 @@
> ** dls lr, \1
> ** and r0, r1, r0, lsr #1
> ** le lr, .L[0-9]+
> +** (
> ** pop {pc}
> +** |
> +** ldr pc, \[sp\], #4
> +** )
> ** )
> */
>
> --
> 2.25.1
>
