Minor fallout from HJ's recent change to the check-function-bodies code
in the testsuite.
The label isn't at all important here, so forcing it match is just a
waste of time. So this patch just skips over the label. It fixes a
handful of failures in testsuite:
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
check-function-bodies atomic_add_fetch_int_acq_rel
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
check-function-bodies atomic_add_fetch_int_acquire
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
check-function-bodies atomic_add_fetch_int_relaxed
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
check-function-bodies atomic_add_fetch_int_release
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
check-function-bodies atomic_add_fetch_int_seq_cst
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_acq_rel
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_acquire
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_relaxed
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_release
unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_seq_cst
Pushed to the trunk,
jeff
commit 7b1e8e0e85ec6f9d80ceb0d38355b2fcd4785f67
Author: Jeff Law <j...@ventanamicro.com>
Date: Mon Jul 7 20:42:04 2025 -0600
[committed][RISC-V] Fix testsuite fallout from check-function-bodies change
Minor fallout from HJ's recent change to the check-function-bodies code in
the testsuite.
The label isn't at all important here, so forcing it match is just a waste
of time. So this patch just skips over the label. It fixes a handful of
failures in testsuite:
> unix//-march=rv32gcv: gcc:
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies
atomic_add_fetch_int_acq_rel
> unix//-march=rv32gcv: gcc:
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies
atomic_add_fetch_int_acquire
> unix//-march=rv32gcv: gcc:
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies
atomic_add_fetch_int_relaxed
> unix//-march=rv32gcv: gcc:
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies
atomic_add_fetch_int_release
> unix//-march=rv32gcv: gcc:
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies
atomic_add_fetch_int_seq_cst
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_acq_rel
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_acquire
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_relaxed
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_release
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
check-function-bodies atomic_add_fetch_int_seq_cst
gcc/testsuite
* gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c: Adjust expected
output.
* gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
index 4cf617d6035..0dfe816ba29 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
@@ -9,7 +9,7 @@
/*
** atomic_add_fetch_int_relaxed:
-** 1:
+**...
** lr.w\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -23,7 +23,7 @@ void atomic_add_fetch_int_relaxed (int* bar, int baz)
/*
** atomic_add_fetch_int_acquire:
-** 1:
+**...
** lr.w.aq\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -37,7 +37,7 @@ void atomic_add_fetch_int_acquire (int* bar, int baz)
/*
** atomic_add_fetch_int_release:
-** 1:
+**...
** lr.w\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -51,7 +51,7 @@ void atomic_add_fetch_int_release (int* bar, int baz)
/*
** atomic_add_fetch_int_acq_rel:
-** 1:
+**...
** lr.w.aq\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -65,7 +65,7 @@ void atomic_add_fetch_int_acq_rel (int* bar, int baz)
/*
** atomic_add_fetch_int_seq_cst:
-** 1:
+**...
** lr.w.aqrl\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
index 3fb16c01191..658b0404b97 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
@@ -9,7 +9,7 @@
/*
** atomic_add_fetch_int_relaxed:
-** 1:
+**...
** lr.w\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -23,7 +23,7 @@ void atomic_add_fetch_int_relaxed (int* bar, int baz)
/*
** atomic_add_fetch_int_acquire:
-** 1:
+**...
** lr.w\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -37,7 +37,7 @@ void atomic_add_fetch_int_acquire (int* bar, int baz)
/*
** atomic_add_fetch_int_release:
-** 1:
+**...
** lr.w\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -51,7 +51,7 @@ void atomic_add_fetch_int_release (int* bar, int baz)
/*
** atomic_add_fetch_int_acq_rel:
-** 1:
+**...
** lr.w\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -65,7 +65,7 @@ void atomic_add_fetch_int_acq_rel (int* bar, int baz)
/*
** atomic_add_fetch_int_seq_cst:
-** 1:
+**...
** lr.w.aqrl\t[atx][0-9]+, 0\(a0\)
** add\t[atx][0-9]+, [atx][0-9]+, a1
** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
