On Wed, May 7, 2025 at 11:29 AM Richard Sandiford <richard.sandif...@arm.com> wrote: > But I thought the code was allowing multiple stores to be forwarded to > a single (wider) load. E.g. 4 individual byte stores at address X, X+1, > X+2 and X+3 could be forwarded to a 4-byte load at address X. And the code > I mentioned is handling the least significant byte by zero-extending it. > > For big-endian targets, the least significant byte should come from > address X+3 rather than address X. The byte at address X (i.e. the > byte with the equal offset) should instead go in the most significant > byte, typically using a shift left. Hi, I'm attaching a patch that we prepared for this. It would be of great help if someone could test it on a big-endian target, preferably one with BITS_BIG_ENDIAN == 0 as we were having issues with that in the past.
Thanks, Konstantinos
0001-asf-Fix-offset-check-in-base-reg-initialization-for-.patch
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