Richard Sandiford <richard.sandif...@arm.com> writes:
> Karl Meakin <karl.mea...@arm.com> writes:
>> + "r<INT_CMP:cmpbr_imm_constraint>"))
>> + (label_ref (match_operand 2))
>> + (pc)))]
>> + "TARGET_CMPBR"
>> + "cb<INT_CMP:cmp_op>\\t%<w>0, %<w>1, %l2";
Sorry, for following up on myself, but: the pattern needs to handle far
branches, in the same way as existing patterns do. That is:
if (get_attr_far_branch (insn) == FAR_BRANCH_YES)
return aarch64_gen_far_branch (...);
else
return "cb<INT_CMP:cmp_op>\\t%<w>0, %<w>1, %l2";
It would be good to have a test for this, e.g. by having an if-then-else
in which the then and else blocks contain a series of 256(+) volatile
stores, with the then and else storing to different volatile locations.
Richard
>> + [(set_attr "type" "branch")
>> + (set (attr "length")
>> + (if_then_else (and (ge (minus (match_dup 2) (pc))
>> + (const_int BRANCH_LEN_N_1Kib))
>> + (lt (minus (match_dup 2) (pc))
>> + (const_int BRANCH_LEN_P_1Kib)))
>> + (const_int 4)
>> + (const_int 8)))
>> + (set (attr "far_branch")
>> + (if_then_else (and (ge (minus (match_dup 2) (pc))
>> + (const_int BRANCH_LEN_N_1Kib))
>> + (lt (minus (match_dup 2) (pc))
>> + (const_int BRANCH_LEN_P_1Kib)))
>> + (const_string "no")
>> + (const_string "yes")))]
>> +)
