ADD/SUB is faster than LEA for most processors. Also, there are
several peephole2 patterns available that convert prologue esp
subtractions to pushes (at the end of i386.md). These process only
patterns with flags reg clobber, so they are ineffective
with clobber-less stack ptr adjustments, introduced by r16-1551
("x86: Enable separate shrink wrapping").
Introduce a peephole2 pattern that adds a clobber to a clobber-less
stack ptr adjustments when FLAGS_REG is dead.
gcc/ChangeLog:
* config/i386/i386.md
(@pro_epilogue_adjust_stack_add_nocc<mode>): Add type attribute.
(pro_epilogue_adjust_stack_add_nocc peephole2 pattern):
Convert pro_epilogue_adjust_stack_add_nocc variant to
pro_epilogue_adjust_stack_add when FLAGS_REG is dead.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 423ef48e518..41a86544bbf 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -27449,7 +27449,7 @@ (define_insn "@pro_epilogue_adjust_stack_add_<mode>"
(cond [(and (eq_attr "alternative" "0")
(not (match_test "TARGET_OPT_AGU")))
(const_string "alu")
- (match_operand:<MODE> 2 "const0_operand")
+ (match_operand 2 "const0_operand")
(const_string "imov")
]
(const_string "lea")))
@@ -27470,7 +27470,7 @@ (define_insn "@pro_epilogue_adjust_stack_add_nocc<mode>"
(clobber (mem:BLK (scratch)))]
""
{
- if (operands[2] == CONST0_RTX (<MODE>mode))
+ if (get_attr_type (insn) == TYPE_IMOV)
return "mov{<imodesuffix>}\t{%1, %0|%0, %1}";
else
{
@@ -27478,13 +27478,31 @@ (define_insn
"@pro_epilogue_adjust_stack_add_nocc<mode>"
return "lea{<imodesuffix>}\t{%E2, %0|%0, %E2}";
}
}
- [(set (attr "length_immediate")
+ [(set (attr "type")
+ (cond [(match_operand 2 "const0_operand")
+ (const_string "imov")
+ ]
+ (const_string "lea")))
+ (set (attr "length_immediate")
(cond [(eq_attr "type" "imov")
(const_string "0")
]
(const_string "*")))
(set_attr "mode" "<MODE>")])
+(define_peephole2
+ [(parallel
+ [(set (match_operand:P 0 "register_operand")
+ (plus:P (match_dup 0)
+ (match_operand:P 1 "<nonmemory_operand>")))
+ (clobber (mem:BLK (scratch)))])]
+ "peep2_regno_dead_p (0, FLAGS_REG)"
+ [(parallel
+ [(set (match_dup 0)
+ (plus:P (match_dup 0) (match_dup 1)))
+ (clobber (reg:CC FLAGS_REG))
+ (clobber (mem:BLK (scratch)))])])
+
(define_insn "@pro_epilogue_adjust_stack_sub_<mode>"
[(set (match_operand:P 0 "register_operand" "=r")
(minus:P (match_operand:P 1 "register_operand" "0")
