On Thu, Jun 19, 2025 at 12:32:57PM GMT, Jakub Jelinek wrote: > As mentioned in another mail, please follow what aarch64 is doing here (at > least unless you explain how it violates your psABI): > if (n <= 8) > info->limb_mode = QImode; > else if (n <= 16) > info->limb_mode = HImode; > else if (n <= 32) > info->limb_mode = SImode; > else if (n <= 64) > info->limb_mode = DImode; > else if (n <= 128) > info->limb_mode = TImode; > else > info->limb_mode = DImode; > > if (n > 128) > info->abi_limb_mode = TImode; > else > info->abi_limb_mode = info->limb_mode; If you have a large bigint like _BitInt(191), which takes up an odd number of 64-bit chunks, I am not sure if lowering with TImode would leave the top (unused) limb alone. In LoongArch psABI that limb is considered undefined and any operations on it should be optimized away.
I was thinking it's just easier to change the assertion like in the other patch to make the (limb_mode = DImode + abi_limb_mode = TImode) legal. > If you have !TARGET_64BIT ABI, using TImode for it looks wrong to me though. > I'm not sure if you do though, while the backend has tons of TARGET_64BIT > checks etc., ISA_BASE_LA64 seems to be the only one except for > N_ISA_BASE_TYPES. Yeah, though !TARGET_64BIT is everywhere, the case is currently not supported, and there will be other patches to sort it out entirely.
