From: Pan Li <pan2...@intel.com> This patch would like to introduce the combine of vec_dup + vmin.vv into vmin.vx on the cost value of GR2VR. The late-combine will take place if the cost of GR2VR is zero, or reject the combine if non-zero like 1, 2, 15 in test. There will be two cases for the combine:
Case 0: | ... | vmv.v.x | L1: | vmin.vv | J L1 | ... Case 1: | ... | L1: | vmv.v.x | vmin.vv | J L1 | ... Both will be combined to below if the cost of GR2VR is zero. | ... | L1: | vmin.vx | J L1 | ... The below test suites are passed for this patch series. * The rv64gcv fully regression test. Pan Li (3): RISC-V: Combine vec_duplicate + vmin.vv to vmin.vx on GR2VR cost RISC-V: Add test for vec_duplicate + vmin.vv combine case 0 with GR2VR cost 0, 2 and 15 RISC-V: Add test for vec_duplicate + vmin.vv combine case 1 with GR2VR cost 0, 1 and 2 gcc/config/riscv/riscv-v.cc | 2 + gcc/config/riscv/riscv.cc | 1 + gcc/config/riscv/vector-iterators.md | 4 +- .../riscv/rvv/autovec/vx_vf/vx-1-i16.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-1-i32.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-1-i64.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-1-i8.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-2-i16.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-2-i32.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-2-i64.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-2-i8.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-3-i16.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-3-i32.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-3-i64.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-3-i8.c | 1 + .../riscv/rvv/autovec/vx_vf/vx-4-i16.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-4-i32.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-4-i64.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-4-i8.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-5-i16.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-5-i32.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-5-i64.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-5-i8.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-6-i16.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-6-i32.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-6-i64.c | 3 + .../riscv/rvv/autovec/vx_vf/vx-6-i8.c | 3 + .../riscv/rvv/autovec/vx_vf/vx_binary.h | 34 ++- .../riscv/rvv/autovec/vx_vf/vx_binary_data.h | 196 ++++++++++++++++++ .../rvv/autovec/vx_vf/vx_vmin-run-1-i16.c | 17 ++ .../rvv/autovec/vx_vf/vx_vmin-run-1-i32.c | 17 ++ .../rvv/autovec/vx_vf/vx_vmin-run-1-i64.c | 17 ++ .../rvv/autovec/vx_vf/vx_vmin-run-1-i8.c | 17 ++ .../rvv/autovec/vx_vf/vx_vmin-run-2-i16.c | 17 ++ .../rvv/autovec/vx_vf/vx_vmin-run-2-i32.c | 17 ++ .../rvv/autovec/vx_vf/vx_vmin-run-2-i64.c | 17 ++ .../rvv/autovec/vx_vf/vx_vmin-run-2-i8.c | 17 ++ 37 files changed, 418 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-1-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-1-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-1-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-1-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-2-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-2-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-2-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-2-i8.c -- 2.43.0
