---
gcc/config/s390/s390.md | 63 +++++++++++++++++++++++++++++++++++++++++-----
1 files changed, 56 insertions(+), 7 deletions(-)
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index ae004ac..d733062 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -384,6 +384,9 @@
;; the same template.
(define_code_iterator SHIFT [ashift lshiftrt])
+;; This iterator allow r[ox]sbg to be defined with the same template
+(define_code_iterator IXOR [ior xor])
+
;; This iterator and attribute allow to combine most atomic operations.
(define_code_iterator ATOMIC [and ior xor plus minus mult])
(define_code_iterator ATOMIC_Z196 [and ior xor plus])
@@ -3402,15 +3405,61 @@
[(set_attr "op_type" "RIE")
(set_attr "z10prop" "z10_super_E1")])
-; and op1 with a mask being 1 for the selected bits and 0 for the rest
-(define_insn "*insv<mode>_or_z10_noshift"
- [(set (match_operand:GPR 0 "nonimmediate_operand" "=d")
- (ior:GPR (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "d")
- (match_operand:GPR 2 "contiguous_bitmask_operand" ""))
- (match_operand:GPR 3 "nonimmediate_operand" "0")))
+(define_insn "*r<noxa>sbg_<mode>_noshift"
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (IXOR:DSI
+ (and:DSI (match_operand:DSI 1 "nonimmediate_operand" "d")
+ (match_operand:DSI 2 "contiguous_bitmask_operand" ""))
+ (match_operand:DSI 3 "nonimmediate_operand" "0")))
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_Z10"
+ "r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,0"
+ [(set_attr "op_type" "RIE")])
+
+(define_insn "*r<noxa>sbg_di_rotl"
+ [(set (match_operand:DI 0 "nonimmediate_operand" "=d")
+ (IXOR:DI
+ (and:DI
+ (rotate:DI
+ (match_operand:DI 1 "nonimmediate_operand" "d")
+ (match_operand:DI 3 "const_int_operand" ""))
+ (match_operand:DI 2 "contiguous_bitmask_operand" ""))
+ (match_operand:DI 4 "nonimmediate_operand" "0")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z10"
- "rosbg\t%0,%1,%<bfstart>2,%<bfend>2,0"
+ "r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,%b3"
+ [(set_attr "op_type" "RIE")])
+
+(define_insn "*r<noxa>sbg_<mode>_srl"
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (IXOR:DSI
+ (and:DSI
+ (lshiftrt:DSI
+ (match_operand:DSI 1 "nonimmediate_operand" "d")
+ (match_operand:DSI 3 "nonzero_shift_count_operand" ""))
+ (match_operand:DSI 2 "contiguous_bitmask_operand" ""))
+ (match_operand:DSI 4 "nonimmediate_operand" "0")))
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_Z10
+ && s390_extzv_shift_ok (<bitsize>, 64 - INTVAL (operands[3]),
+ INTVAL (operands[2]))"
+ "r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,64-%3"
+ [(set_attr "op_type" "RIE")])
+
+(define_insn "*r<noxa>sbg_<mode>_sll"
+ [(set (match_operand:DSI 0 "nonimmediate_operand" "=d")
+ (IXOR:DSI
+ (and:DSI
+ (ashift:DSI
+ (match_operand:DSI 1 "nonimmediate_operand" "d")
+ (match_operand:DSI 3 "nonzero_shift_count_operand" ""))
+ (match_operand:DSI 2 "contiguous_bitmask_operand" ""))
+ (match_operand:DSI 4 "nonimmediate_operand" "0")))
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_Z10
+ && s390_extzv_shift_ok (<bitsize>, INTVAL (operands[3]),
+ INTVAL (operands[2]))"
+ "r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,%3"
[(set_attr "op_type" "RIE")])
(define_insn "*insv<mode>_mem_reg"
--
1.7.7.6
