This is the result of using a regexp to replace instances of:
<stuff> = get_insns ();
end_sequence ();
with:
<stuff> = end_sequence ();
where the indentation is the same for both lines, and where there
might be blank lines inbetween.
gcc/
* asan.cc (asan_clear_shadow): Use the return value of end_sequence,
rather than calling get_insns separately.
(asan_emit_stack_protection, asan_emit_allocas_unpoison): Likewise.
(hwasan_frame_base, hwasan_emit_untag_frame): Likewise.
* auto-inc-dec.cc (attempt_change): Likewise.
* avoid-store-forwarding.cc (process_store_forwarding): Likewise.
* bb-reorder.cc (fix_crossing_unconditional_branches): Likewise.
* builtins.cc (expand_builtin_apply_args): Likewise.
(expand_builtin_return, expand_builtin_mathfn_ternary): Likewise.
(expand_builtin_mathfn_3, expand_builtin_int_roundingfn): Likewise.
(expand_builtin_int_roundingfn_2, expand_builtin_saveregs): Likewise.
(inline_string_cmp): Likewise.
* calls.cc (expand_call): Likewise.
* cfgexpand.cc (expand_asm_stmt, pass_expand::execute): Likewise.
* cfgloopanal.cc (init_set_costs): Likewise.
* cfgrtl.cc (insert_insn_on_edge, prepend_insn_to_edge): Likewise.
(rtl_lv_add_condition_to_bb): Likewise.
* config/aarch64/aarch64-speculation.cc
(aarch64_speculation_clobber_sp): Likewise.
(aarch64_speculation_establish_tracker): Likewise.
(aarch64_do_track_speculation): Likewise.
* config/aarch64/aarch64.cc (aarch64_load_symref_appropriately)
(aarch64_expand_vector_init, aarch64_gen_ccmp_first): Likewise.
(aarch64_gen_ccmp_next, aarch64_mode_emit): Likewise.
(aarch64_md_asm_adjust): Likewise.
(aarch64_switch_pstate_sm_for_landing_pad): Likewise.
(aarch64_switch_pstate_sm_for_jump): Likewise.
(aarch64_switch_pstate_sm_for_call): Likewise.
* config/alpha/alpha.cc (alpha_legitimize_address_1): Likewise.
(alpha_emit_xfloating_libcall, alpha_gp_save_rtx): Likewise.
* config/arc/arc.cc (hwloop_optimize): Likewise.
* config/arm/aarch-common.cc (arm_md_asm_adjust): Likewise.
* config/arm/arm-builtins.cc: Likewise.
* config/arm/arm.cc (require_pic_register): Likewise.
(arm_call_tls_get_addr, arm_gen_load_multiple_1): Likewise.
(arm_gen_store_multiple_1, cmse_clear_registers): Likewise.
(cmse_nonsecure_call_inline_register_clear): Likewise.
(arm_attempt_dlstp_transform): Likewise.
* config/avr/avr-passes.cc (bbinfo_t::optimize_one_block): Likewise.
(avr_parallel_insn_from_insns): Likewise.
* config/avr/avr.cc (avr_prologue_setup_frame): Likewise.
(avr_expand_epilogue): Likewise.
* config/bfin/bfin.cc (hwloop_optimize): Likewise.
* config/c6x/c6x.cc (c6x_expand_compare): Likewise.
* config/cris/cris.cc (cris_split_movdx): Likewise.
* config/cris/cris.md: Likewise.
* config/csky/csky.cc (csky_call_tls_get_addr): Likewise.
* config/epiphany/resolve-sw-modes.cc
(pass_resolve_sw_modes::execute): Likewise.
* config/fr30/fr30.cc (fr30_move_double): Likewise.
* config/frv/frv.cc (frv_split_scc, frv_split_cond_move): Likewise.
(frv_split_minmax, frv_split_abs): Likewise.
* config/frv/frv.md: Likewise.
* config/gcn/gcn.cc (move_callee_saved_registers): Likewise.
(gcn_expand_prologue, gcn_restore_exec, gcn_md_reorg): Likewise.
* config/i386/i386-expand.cc
(ix86_expand_carry_flag_compare, ix86_expand_int_movcc): Likewise.
(ix86_vector_duplicate_value, expand_vec_perm_interleave2): Likewise.
(expand_vec_perm_vperm2f128_vblend): Likewise.
(expand_vec_perm_2perm_interleave): Likewise.
(expand_vec_perm_2perm_pblendv): Likewise.
(expand_vec_perm2_vperm2f128_vblend, ix86_gen_ccmp_first): Likewise.
(ix86_gen_ccmp_next): Likewise.
* config/i386/i386-features.cc
(scalar_chain::make_vector_copies): Likewise.
(scalar_chain::convert_reg, scalar_chain::convert_op): Likewise.
(timode_scalar_chain::convert_insn): Likewise.
* config/i386/i386.cc (ix86_init_pic_reg, ix86_va_start): Likewise.
(ix86_get_drap_rtx, legitimize_tls_address): Likewise.
(ix86_md_asm_adjust): Likewise.
* config/ia64/ia64.cc (ia64_expand_tls_address): Likewise.
(ia64_expand_compare, spill_restore_mem): Likewise.
(expand_vec_perm_interleave_2): Likewise.
* config/loongarch/loongarch.cc
(loongarch_call_tls_get_addr): Likewise.
* config/m32r/m32r.cc (gen_split_move_double): Likewise.
* config/m32r/m32r.md: Likewise.
* config/m68k/m68k.cc (m68k_call_tls_get_addr): Likewise.
(m68k_call_m68k_read_tp, m68k_sched_md_init_global): Likewise.
* config/m68k/m68k.md: Likewise.
* config/microblaze/microblaze.cc
(microblaze_call_tls_get_addr): Likewise.
* config/mips/mips.cc (mips_call_tls_get_addr): Likewise.
(mips_ls2_init_dfa_post_cycle_insn): Likewise.
(mips16_split_long_branches): Likewise.
* config/nvptx/nvptx.cc (nvptx_gen_shuffle): Likewise.
(nvptx_gen_shared_bcast, nvptx_propagate): Likewise.
(workaround_uninit_method_1, workaround_uninit_method_2): Likewise.
(workaround_uninit_method_3): Likewise.
* config/or1k/or1k.cc (or1k_init_pic_reg): Likewise.
* config/pa/pa.cc (legitimize_tls_address): Likewise.
* config/pru/pru.cc (pru_expand_fp_compare, pru_reorg_loop): Likewise.
* config/riscv/riscv-shorten-memrefs.cc
(pass_shorten_memrefs::transform): Likewise.
* config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Likewise.
* config/riscv/riscv.cc (riscv_call_tls_get_addr): Likewise.
(riscv_frm_emit_after_bb_end): Likewise.
* config/rl78/rl78.cc (rl78_emit_libcall): Likewise.
* config/rs6000/rs6000.cc (rs6000_debug_legitimize_address): Likewise.
* config/s390/s390.cc (legitimize_tls_address): Likewise.
(s390_two_part_insv, s390_load_got, s390_va_start): Likewise.
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_not_reg_insn): Likewise.
* config/sparc/sparc.cc (sparc_legitimize_tls_address): Likewise.
(sparc_output_mi_thunk, sparc_init_pic_reg): Likewise.
* config/stormy16/stormy16.cc (xstormy16_split_cbranch): Likewise.
* config/xtensa/xtensa.cc (xtensa_copy_incoming_a7): Likewise.
(xtensa_expand_block_set_libcall): Likewise.
(xtensa_expand_block_set_unrolled_loop): Likewise.
(xtensa_expand_block_set_small_loop, xtensa_call_tls_desc): Likewise.
* dse.cc (emit_inc_dec_insn_before, find_shift_sequence): Likewise.
(replace_read): Likewise.
* emit-rtl.cc (reorder_insns, gen_clobber, gen_use): Likewise.
* except.cc (dw2_build_landing_pads, sjlj_mark_call_sites): Likewise.
(sjlj_emit_function_enter, sjlj_emit_function_exit): Likewise.
(sjlj_emit_dispatch_table): Likewise.
* expmed.cc (expmed_mult_highpart_optab, expand_sdiv_pow2): Likewise.
* expr.cc (convert_mode_scalar, emit_move_multi_word): Likewise.
(gen_move_insn, expand_cond_expr_using_cmove): Likewise.
(expand_expr_divmod, expand_expr_real_2): Likewise.
(maybe_optimize_pow2p_mod_cmp, maybe_optimize_mod_cmp): Likewise.
* function.cc (emit_initial_value_sets): Likewise.
(instantiate_virtual_regs_in_insn, expand_function_end): Likewise.
(get_arg_pointer_save_area, make_split_prologue_seq): Likewise.
(make_prologue_seq, gen_call_used_regs_seq): Likewise.
(thread_prologue_and_epilogue_insns): Likewise.
(match_asm_constraints_1): Likewise.
* gcse.cc (prepare_copy_insn): Likewise.
* ifcvt.cc (noce_emit_store_flag, noce_emit_move_insn): Likewise.
(noce_emit_cmove): Likewise.
* init-regs.cc (initialize_uninitialized_regs): Likewise.
* internal-fn.cc (expand_POPCOUNT): Likewise.
* ira-emit.cc (emit_move_list): Likewise.
* ira.cc (ira): Likewise.
* loop-doloop.cc (doloop_modify): Likewise.
* loop-unroll.cc (compare_and_jump_seq): Likewise.
(unroll_loop_runtime_iterations, insert_base_initialization): Likewise.
(split_iv, insert_var_expansion_initialization): Likewise.
(combine_var_copies_in_loop_exit): Likewise.
* lower-subreg.cc (resolve_simple_move,resolve_shift_zext): Likewise.
* lra-constraints.cc (match_reload, check_and_process_move): Likewise.
(process_addr_reg, insert_move_for_subreg): Likewise.
(process_address_1, curr_insn_transform): Likewise.
(inherit_reload_reg, process_invariant_for_inheritance): Likewise.
(inherit_in_ebb, remove_inheritance_pseudos): Likewise.
* lra-remat.cc (do_remat): Likewise.
* mode-switching.cc (commit_mode_sets): Likewise.
(optimize_mode_switching): Likewise.
* optabs.cc (expand_binop, expand_twoval_binop_libfunc): Likewise.
(expand_clrsb_using_clz, expand_doubleword_clz_ctz_ffs): Likewise.
(expand_doubleword_popcount, expand_ctz, expand_ffs): Likewise.
(expand_absneg_bit, expand_unop, expand_copysign_bit): Likewise.
(prepare_float_lib_cmp, expand_float, expand_fix): Likewise.
(expand_fixed_convert, gen_cond_trap): Likewise.
(expand_atomic_fetch_op): Likewise.
* ree.cc (combine_reaching_defs): Likewise.
* reg-stack.cc (compensate_edge): Likewise.
* reload1.cc (emit_input_reload_insns): Likewise.
* sel-sched-ir.cc (setup_nop_and_exit_insns): Likewise.
* shrink-wrap.cc (emit_common_heads_for_components): Likewise.
(emit_common_tails_for_components): Likewise.
(insert_prologue_epilogue_for_components): Likewise.
* tree-outof-ssa.cc (emit_partition_copy): Likewise.
(insert_value_copy_on_edge): Likewise.
* tree-ssa-loop-ivopts.cc (computation_cost): Likewise.
---
gcc/asan.cc | 15 ++----
gcc/auto-inc-dec.cc | 3 +-
gcc/avoid-store-forwarding.cc | 3 +-
gcc/bb-reorder.cc | 3 +-
gcc/builtins.cc | 27 ++++------
gcc/calls.cc | 6 +--
gcc/cfgexpand.cc | 6 +--
gcc/cfgloopanal.cc | 6 +--
gcc/cfgrtl.cc | 9 ++--
gcc/config/aarch64/aarch64-speculation.cc | 9 ++--
gcc/config/aarch64/aarch64.cc | 39 +++++---------
gcc/config/alpha/alpha.cc | 12 ++---
gcc/config/arc/arc.cc | 3 +-
gcc/config/arm/aarch-common.cc | 3 +-
gcc/config/arm/arm-builtins.cc | 3 +-
gcc/config/arm/arm.cc | 24 +++------
gcc/config/avr/avr-passes.cc | 6 +--
gcc/config/avr/avr.cc | 12 ++---
gcc/config/bfin/bfin.cc | 3 +-
gcc/config/c6x/c6x.cc | 3 +-
gcc/config/cris/cris.cc | 3 +-
gcc/config/cris/cris.md | 3 +-
gcc/config/csky/csky.cc | 3 +-
gcc/config/epiphany/resolve-sw-modes.cc | 3 +-
gcc/config/fr30/fr30.cc | 3 +-
gcc/config/frv/frv.cc | 12 ++---
gcc/config/frv/frv.md | 15 ++----
gcc/config/gcn/gcn.cc | 18 +++----
gcc/config/i386/i386-expand.cc | 45 ++++++----------
gcc/config/i386/i386-features.cc | 12 ++---
gcc/config/i386/i386.cc | 18 +++----
gcc/config/ia64/ia64.cc | 15 ++----
gcc/config/loongarch/loongarch.cc | 4 +-
gcc/config/m32r/m32r.cc | 3 +-
gcc/config/m32r/m32r.md | 6 +--
gcc/config/m68k/m68k.cc | 9 ++--
gcc/config/m68k/m68k.md | 12 ++---
gcc/config/microblaze/microblaze.cc | 3 +-
gcc/config/mips/mips.cc | 19 +++----
gcc/config/nvptx/nvptx.cc | 39 +++++---------
gcc/config/or1k/or1k.cc | 3 +-
gcc/config/pa/pa.cc | 3 +-
gcc/config/pru/pru.cc | 6 +--
gcc/config/riscv/riscv-shorten-memrefs.cc | 3 +-
gcc/config/riscv/riscv-vsetvl.cc | 6 +--
gcc/config/riscv/riscv.cc | 10 ++--
gcc/config/rl78/rl78.cc | 3 +-
gcc/config/rs6000/rs6000.cc | 3 +-
gcc/config/s390/s390.cc | 21 +++-----
gcc/config/sh/sh_treg_combine.cc | 3 +-
gcc/config/sparc/sparc.cc | 15 ++----
gcc/config/stormy16/stormy16.cc | 3 +-
gcc/config/xtensa/xtensa.cc | 15 ++----
gcc/dse.cc | 9 ++--
gcc/emit-rtl.cc | 9 ++--
gcc/except.cc | 21 +++-----
gcc/expmed.cc | 6 +--
gcc/expr.cc | 54 +++++++------------
gcc/function.cc | 57 +++++++-------------
gcc/gcse.cc | 3 +-
gcc/ifcvt.cc | 9 ++--
gcc/init-regs.cc | 3 +-
gcc/internal-fn.cc | 12 ++---
gcc/ira-emit.cc | 6 +--
gcc/ira.cc | 3 +-
gcc/loop-doloop.cc | 3 +-
gcc/loop-unroll.cc | 21 +++-----
gcc/lower-subreg.cc | 7 +--
gcc/lra-constraints.cc | 54 +++++++------------
gcc/lra-remat.cc | 3 +-
gcc/mode-switching.cc | 6 +--
gcc/optabs.cc | 63 ++++++++---------------
gcc/ree.cc | 3 +-
gcc/reg-stack.cc | 3 +-
gcc/reload1.cc | 3 +-
gcc/sel-sched-ir.cc | 3 +-
gcc/shrink-wrap.cc | 18 +++----
gcc/tree-outof-ssa.cc | 6 +--
gcc/tree-ssa-loop-ivopts.cc | 3 +-
79 files changed, 306 insertions(+), 616 deletions(-)
diff --git a/gcc/asan.cc b/gcc/asan.cc
index ebf806cffb6..dfb044c08b7 100644
--- a/gcc/asan.cc
+++ b/gcc/asan.cc
@@ -1509,8 +1509,7 @@ asan_clear_shadow (rtx shadow_mem, HOST_WIDE_INT len)
gcc_assert ((len & 3) == 0);
start_sequence ();
clear_storage (shadow_mem, GEN_INT (len), BLOCK_OP_NORMAL);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
for (insn = insns; insn; insn = NEXT_INSN (insn))
if (CALL_P (insn))
break;
@@ -2283,8 +2282,7 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned
int alignb,
if (lab)
emit_label (lab);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
return insns;
}
@@ -2306,8 +2304,7 @@ asan_emit_allocas_unpoison (rtx top, rtx bot, rtx_insn
*before)
top, ptr_mode, bot, ptr_mode);
do_pending_stack_adjust ();
- rtx_insn *insns = get_insns ();
- end_sequence ();
+ rtx_insn *insns = end_sequence ();
return insns;
}
@@ -4472,8 +4469,7 @@ hwasan_frame_base ()
= force_reg (Pmode,
targetm.memtag.insert_random_tag (virtual_stack_vars_rtx,
NULL_RTX));
- hwasan_frame_base_init_seq = get_insns ();
- end_sequence ();
+ hwasan_frame_base_init_seq = end_sequence ();
}
return hwasan_frame_base_ptr;
@@ -4741,8 +4737,7 @@ hwasan_emit_untag_frame (rtx dynamic, rtx vars)
size_rtx, ptr_mode);
do_pending_stack_adjust ();
- rtx_insn *insns = get_insns ();
- end_sequence ();
+ rtx_insn *insns = end_sequence ();
return insns;
}
diff --git a/gcc/auto-inc-dec.cc b/gcc/auto-inc-dec.cc
index 0a1b854a9d1..09e2cff7f73 100644
--- a/gcc/auto-inc-dec.cc
+++ b/gcc/auto-inc-dec.cc
@@ -493,8 +493,7 @@ attempt_change (rtx new_addr, rtx inc_reg)
{
start_sequence ();
emit_move_insn (inc_insn.reg_res, inc_insn.reg0);
- mov_insn = get_insns ();
- end_sequence ();
+ mov_insn = end_sequence ();
new_cost += seq_cost (mov_insn, speed);
}
diff --git a/gcc/avoid-store-forwarding.cc b/gcc/avoid-store-forwarding.cc
index ded8d7e596e..5d960adec35 100644
--- a/gcc/avoid-store-forwarding.cc
+++ b/gcc/avoid-store-forwarding.cc
@@ -351,8 +351,7 @@ process_store_forwarding (vec<store_fwd_info> &stores,
rtx_insn *load_insn,
start_sequence ();
rtx_insn *insn = emit_insn (load_move);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
if (recog_memoized (insn) < 0)
return false;
diff --git a/gcc/bb-reorder.cc b/gcc/bb-reorder.cc
index efbf793744a..641b4928ffb 100644
--- a/gcc/bb-reorder.cc
+++ b/gcc/bb-reorder.cc
@@ -2287,8 +2287,7 @@ fix_crossing_unconditional_branches (void)
start_sequence ();
emit_move_insn (new_reg, label_addr);
emit_indirect_jump (new_reg);
- indirect_jump_sequence = get_insns ();
- end_sequence ();
+ indirect_jump_sequence = end_sequence ();
/* Make sure every instruction in the new jump sequence has
its basic block set to be cur_bb. */
diff --git a/gcc/builtins.cc b/gcc/builtins.cc
index a5f711a7b6a..e818e819f7c 100644
--- a/gcc/builtins.cc
+++ b/gcc/builtins.cc
@@ -1640,8 +1640,7 @@ expand_builtin_apply_args (void)
start_sequence ();
temp = expand_builtin_apply_args_1 ();
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
apply_args_value = temp;
@@ -1863,8 +1862,7 @@ expand_builtin_return (rtx result)
push_to_sequence (call_fusage);
emit_use (reg);
- call_fusage = get_insns ();
- end_sequence ();
+ call_fusage = end_sequence ();
size += GET_MODE_SIZE (mode);
}
@@ -2373,8 +2371,7 @@ expand_builtin_mathfn_ternary (tree exp, rtx target, rtx
subtarget)
}
/* Output the entire sequence. */
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
return result;
@@ -2466,8 +2463,7 @@ expand_builtin_mathfn_3 (tree exp, rtx target, rtx
subtarget)
if (result != 0)
{
/* Output the entire sequence. */
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
return result;
}
@@ -3164,8 +3160,7 @@ expand_builtin_int_roundingfn (tree exp, rtx target)
if (expand_sfix_optab (target, op0, builtin_optab))
{
/* Output the entire sequence. */
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
return target;
}
@@ -3308,8 +3303,7 @@ expand_builtin_int_roundingfn_2 (tree exp, rtx target)
if (expand_sfix_optab (result, op0, builtin_optab))
{
/* Output the entire sequence. */
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
return result;
}
@@ -3477,8 +3471,7 @@ expand_builtin_strlen (tree exp, rtx target,
#endif
emit_move_insn (src_reg, pat);
}
- pat = get_insns ();
- end_sequence ();
+ pat = end_sequence ();
if (before_strlen)
emit_insn_after (pat, before_strlen);
@@ -5183,8 +5176,7 @@ expand_builtin_saveregs (void)
/* Do whatever the machine needs done in this case. */
val = targetm.calls.expand_builtin_saveregs ();
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
saveregs_value = val;
@@ -7624,8 +7616,7 @@ inline_string_cmp (rtx target, tree var_str, const char
*const_str,
}
emit_label (ne_label);
- rtx_insn *insns = get_insns ();
- end_sequence ();
+ rtx_insn *insns = end_sequence ();
emit_insn (insns);
return result;
diff --git a/gcc/calls.cc b/gcc/calls.cc
index 676f0f9229e..164f3c515d9 100644
--- a/gcc/calls.cc
+++ b/gcc/calls.cc
@@ -3790,8 +3790,7 @@ expand_call (tree exp, rtx target, int ignore)
add_reg_note (last, REG_NOALIAS, temp);
/* Write out the sequence. */
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
valreg = temp;
}
@@ -4007,8 +4006,7 @@ expand_call (tree exp, rtx target, int ignore)
targetm.calls.end_call_args (args_so_far);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (pass == 0)
{
diff --git a/gcc/cfgexpand.cc b/gcc/cfgexpand.cc
index 277ef659f30..8919cc33539 100644
--- a/gcc/cfgexpand.cc
+++ b/gcc/cfgexpand.cc
@@ -3976,8 +3976,7 @@ expand_asm_stmt (gasm *stmt)
start_sequence ();
duplicate_insn_chain (after_rtl_seq, after_rtl_end,
NULL, NULL);
- copy = get_insns ();
- end_sequence ();
+ copy = end_sequence ();
}
prepend_insn_to_edge (copy, e);
}
@@ -7024,8 +7023,7 @@ pass_expand::execute (function *fun)
var_ret_seq = expand_used_vars (forced_stack_vars);
- var_seq = get_insns ();
- end_sequence ();
+ var_seq = end_sequence ();
timevar_pop (TV_VAR_EXPAND);
/* Honor stack protection warnings. */
diff --git a/gcc/cfgloopanal.cc b/gcc/cfgloopanal.cc
index f609494be80..491d4dcad14 100644
--- a/gcc/cfgloopanal.cc
+++ b/gcc/cfgloopanal.cc
@@ -471,15 +471,13 @@ init_set_costs (void)
start_sequence ();
emit_move_insn (reg1, reg2);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
target_reg_cost [speed] = seq_cost (seq, speed);
start_sequence ();
emit_move_insn (mem, reg1);
emit_move_insn (reg2, mem);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
target_spill_cost [speed] = seq_cost (seq, speed);
}
default_rtl_profile ();
diff --git a/gcc/cfgrtl.cc b/gcc/cfgrtl.cc
index 310028f1719..9add2533e74 100644
--- a/gcc/cfgrtl.cc
+++ b/gcc/cfgrtl.cc
@@ -1982,8 +1982,7 @@ insert_insn_on_edge (rtx pattern, edge e)
emit_insn (pattern);
- e->insns.r = get_insns ();
- end_sequence ();
+ e->insns.r = end_sequence ();
}
/* Like insert_insn_on_edge, but if there are already queued instructions
@@ -2001,8 +2000,7 @@ prepend_insn_to_edge (rtx pattern, edge e)
emit_insn (pattern);
emit_insn (e->insns.r);
- e->insns.r = get_insns ();
- end_sequence ();
+ e->insns.r = end_sequence ();
}
/* Update the CFG for the instructions queued on edge E. */
@@ -5278,8 +5276,7 @@ rtl_lv_add_condition_to_bb (basic_block first_head ,
jump = get_last_insn ();
JUMP_LABEL (jump) = label;
LABEL_NUSES (label)++;
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
/* Add the new cond, in the new head. */
emit_insn_after (seq, BB_END (cond_bb));
diff --git a/gcc/config/aarch64/aarch64-speculation.cc
b/gcc/config/aarch64/aarch64-speculation.cc
index 1c7be1a8ae6..5bcbfad2c13 100644
--- a/gcc/config/aarch64/aarch64-speculation.cc
+++ b/gcc/config/aarch64/aarch64-speculation.cc
@@ -160,8 +160,7 @@ aarch64_speculation_clobber_sp ()
emit_insn (gen_rtx_SET (scratch, sp));
emit_insn (gen_anddi3 (scratch, scratch, tracker));
emit_insn (gen_rtx_SET (sp, scratch));
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
return seq;
}
@@ -176,8 +175,7 @@ aarch64_speculation_establish_tracker ()
rtx cc = aarch64_gen_compare_reg (EQ, sp, const0_rtx);
emit_insn (gen_cstoredi_neg (tracker,
gen_rtx_NE (CCmode, cc, const0_rtx), cc));
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
return seq;
}
@@ -405,8 +403,7 @@ aarch64_do_track_speculation ()
{
start_sequence ();
emit_insn (seq);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
}
for (rtx_insn *list = seq; list; list = NEXT_INSN (list))
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 9e3f2885bcc..901aa6ea68a 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -3201,8 +3201,7 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
aarch64_emit_call_insn (gen_tlsgd_small_si (result, imm));
else
aarch64_emit_call_insn (gen_tlsgd_small_di (result, imm));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
RTL_CONST_CALL_P (insns) = 1;
emit_libcall_block (insns, tmp_reg, result, imm);
@@ -24662,8 +24661,7 @@ aarch64_expand_vector_init (rtx target, rtx vals)
rtx tmp_reg = gen_reg_rtx (GET_MODE (new_vals));
aarch64_expand_vector_init (tmp_reg, new_vals);
halves[i] = gen_rtx_SUBREG (mode, tmp_reg, 0);
- rtx_insn *rec_seq = get_insns ();
- end_sequence ();
+ rtx_insn *rec_seq = end_sequence ();
costs[i] = seq_cost_ignoring_scalar_moves (rec_seq, !optimize_size);
emit_insn (rec_seq);
}
@@ -24675,8 +24673,7 @@ aarch64_expand_vector_init (rtx target, rtx vals)
= (!optimize_size) ? std::max (costs[0], costs[1]) : costs[0] + costs[1];
seq_total_cost += insn_cost (zip1_insn, !optimize_size);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
start_sequence ();
aarch64_expand_vector_init_fallback (target, vals);
@@ -27803,8 +27800,7 @@ aarch64_gen_ccmp_first (rtx_insn **prep_seq, rtx_insn
**gen_seq,
end_sequence ();
return NULL_RTX;
}
- *prep_seq = get_insns ();
- end_sequence ();
+ *prep_seq = end_sequence ();
create_fixed_operand (&ops[0], op0);
create_fixed_operand (&ops[1], op1);
@@ -27815,8 +27811,7 @@ aarch64_gen_ccmp_first (rtx_insn **prep_seq, rtx_insn
**gen_seq,
end_sequence ();
return NULL_RTX;
}
- *gen_seq = get_insns ();
- end_sequence ();
+ *gen_seq = end_sequence ();
return gen_rtx_fmt_ee (code, cc_mode,
gen_rtx_REG (cc_mode, CC_REGNUM), const0_rtx);
@@ -27880,8 +27875,7 @@ aarch64_gen_ccmp_next (rtx_insn **prep_seq, rtx_insn
**gen_seq, rtx prev,
end_sequence ();
return NULL_RTX;
}
- *prep_seq = get_insns ();
- end_sequence ();
+ *prep_seq = end_sequence ();
target = gen_rtx_REG (cc_mode, CC_REGNUM);
aarch64_cond = aarch64_get_condition_code_1 (cc_mode, cmp_code);
@@ -27920,8 +27914,7 @@ aarch64_gen_ccmp_next (rtx_insn **prep_seq, rtx_insn
**gen_seq, rtx prev,
return NULL_RTX;
}
- *gen_seq = get_insns ();
- end_sequence ();
+ *gen_seq = end_sequence ();
return gen_rtx_fmt_ee (cmp_code, VOIDmode, target, const0_rtx);
}
@@ -30506,8 +30499,7 @@ aarch64_mode_emit (int entity, int mode, int prev_mode,
HARD_REG_SET live)
aarch64_local_sme_state (prev_mode));
break;
}
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
/* Get the set of clobbered registers that are currently live. */
HARD_REG_SET clobbers = {};
@@ -30917,8 +30909,7 @@ aarch64_md_asm_adjust (vec<rtx> &outputs, vec<rtx>
&inputs,
emit_insn (REGNO (x) == ZA_REGNUM
? gen_aarch64_asm_update_za (id_rtx)
: gen_aarch64_asm_update_zt0 (id_rtx));
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
auto mode = REGNO (x) == ZA_REGNUM ? VNx16QImode : V8DImode;
uses.safe_push (gen_rtx_REG (mode, REGNO (x)));
@@ -30953,8 +30944,7 @@ aarch64_switch_pstate_sm_for_landing_pad (basic_block
bb)
args_switch.emit_epilogue ();
if (guard_label)
emit_label (guard_label);
- auto seq = get_insns ();
- end_sequence ();
+ auto seq = end_sequence ();
emit_insn_after (seq, bb_note (bb));
return true;
@@ -30977,8 +30967,7 @@ aarch64_switch_pstate_sm_for_jump (rtx_insn *jump)
aarch64_switch_pstate_sm (AARCH64_ISA_MODE_SM_ON, AARCH64_ISA_MODE_SM_OFF);
if (guard_label)
emit_label (guard_label);
- auto seq = get_insns ();
- end_sequence ();
+ auto seq = end_sequence ();
emit_insn_before (seq, jump);
return true;
@@ -31012,8 +31001,7 @@ aarch64_switch_pstate_sm_for_call (rtx_call_insn *call)
args_switch.emit_epilogue ();
if (args_guard_label)
emit_label (args_guard_label);
- auto args_seq = get_insns ();
- end_sequence ();
+ auto args_seq = end_sequence ();
emit_insn_before (args_seq, call);
if (find_reg_note (call, REG_NORETURN, NULL_RTX))
@@ -31033,8 +31021,7 @@ aarch64_switch_pstate_sm_for_call (rtx_call_insn *call)
return_switch.emit_epilogue ();
if (return_guard_label)
emit_label (return_guard_label);
- auto result_seq = get_insns ();
- end_sequence ();
+ auto result_seq = end_sequence ();
emit_insn_after (result_seq, call);
return true;
}
diff --git a/gcc/config/alpha/alpha.cc b/gcc/config/alpha/alpha.cc
index 14e7da57ca6..5082c1ca095 100644
--- a/gcc/config/alpha/alpha.cc
+++ b/gcc/config/alpha/alpha.cc
@@ -1036,8 +1036,7 @@ alpha_legitimize_address_1 (rtx x, rtx scratch,
machine_mode mode)
RTL_CONST_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r16);
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
emit_libcall_block (insn, dest, r0, x);
return dest;
@@ -1059,8 +1058,7 @@ alpha_legitimize_address_1 (rtx x, rtx scratch,
machine_mode mode)
RTL_CONST_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r16);
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
UNSPEC_TLSLDM_CALL);
@@ -3214,8 +3212,7 @@ alpha_emit_xfloating_libcall (rtx func, rtx target, rtx
operands[],
CALL_INSN_FUNCTION_USAGE (tmp) = usage;
RTL_CONST_CALL_P (tmp) = 1;
- tmp = get_insns ();
- end_sequence ();
+ tmp = end_sequence ();
emit_libcall_block (tmp, target, reg, equiv);
}
@@ -5596,8 +5593,7 @@ alpha_gp_save_rtx (void)
m = validize_mem (m);
emit_move_insn (m, pic_offset_table_rtx);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
/* We used to simply emit the sequence after entry_of_function.
However this breaks the CFG if the first instruction in the
diff --git a/gcc/config/arc/arc.cc b/gcc/config/arc/arc.cc
index 3b4b038f6fe..78ba814d223 100644
--- a/gcc/config/arc/arc.cc
+++ b/gcc/config/arc/arc.cc
@@ -8218,8 +8218,7 @@ hwloop_optimize (hwloop_info loop)
insn = emit_insn (gen_arc_lp (loop->start_label,
loop->end_label));
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
entry_after = BB_END (entry_bb);
if (!single_succ_p (entry_bb) || vec_safe_length (loop->incoming) > 1
diff --git a/gcc/config/arm/aarch-common.cc b/gcc/config/arm/aarch-common.cc
index 328985337ae..9cd926ea59c 100644
--- a/gcc/config/arm/aarch-common.cc
+++ b/gcc/config/arm/aarch-common.cc
@@ -655,8 +655,7 @@ arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
emit_move_insn (dest, tmp);
}
}
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
return saw_asm_flag ? seq : NULL;
}
diff --git a/gcc/config/arm/arm-builtins.cc b/gcc/config/arm/arm-builtins.cc
index 0ddc6669509..3bb2566f9a2 100644
--- a/gcc/config/arm/arm-builtins.cc
+++ b/gcc/config/arm/arm-builtins.cc
@@ -2285,8 +2285,7 @@ constant_arg:
builtin and error out if not. */
start_sequence ();
emit_insn (pat);
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
if (recog_memoized (insn) < 0)
error ("this builtin is not supported for this target");
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 8737c223391..60c961ab272 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -8073,8 +8073,7 @@ require_pic_register (rtx pic_reg, bool compute_now)
else
arm_load_pic_register (0UL, pic_reg);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
for (insn = seq; insn; insn = NEXT_INSN (insn))
if (INSN_P (insn))
@@ -9279,8 +9278,7 @@ arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int
reloc)
LCT_PURE, /* LCT_CONST? */
Pmode, reg, Pmode);
- rtx_insn *insns = get_insns ();
- end_sequence ();
+ rtx_insn *insns = end_sequence ();
return insns;
}
@@ -14905,8 +14903,7 @@ arm_gen_load_multiple_1 (int count, int *regs, rtx
*mems, rtx basereg,
if (wback_offset != 0)
emit_move_insn (basereg, plus_constant (Pmode, basereg, wback_offset));
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
@@ -14956,8 +14953,7 @@ arm_gen_store_multiple_1 (int count, int *regs, rtx
*mems, rtx basereg,
if (wback_offset != 0)
emit_move_insn (basereg, plus_constant (Pmode, basereg, wback_offset));
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
@@ -18845,8 +18841,7 @@ cmse_clear_registers (sbitmap to_clear_bitmap, uint32_t
*padding_bits_to_clear,
XVECEXP (par, 0, k++) = set;
emit_use (reg);
}
- use_seq = get_insns ();
- end_sequence ();
+ use_seq = end_sequence ();
emit_insn_after (use_seq, emit_insn (par));
}
@@ -18891,8 +18886,7 @@ cmse_clear_registers (sbitmap to_clear_bitmap, uint32_t
*padding_bits_to_clear,
rtx clobber = gen_rtx_CLOBBER (VOIDmode, ccreg);
XVECEXP (par, 0, j) = clobber;
- use_seq = get_insns ();
- end_sequence ();
+ use_seq = end_sequence ();
emit_insn_after (use_seq, emit_insn (par));
}
@@ -19133,8 +19127,7 @@ cmse_nonsecure_call_inline_register_clear (void)
cmse_clear_registers (to_clear_bitmap, padding_bits_to_clear,
NUM_ARG_REGS, ip_reg, clearing_reg);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
/* The AAPCS requires the callee to widen integral types narrower
@@ -35588,8 +35581,7 @@ arm_attempt_dlstp_transform (rtx label)
emit_insn (PATTERN (insn));
}
}
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
/* Re-write the entire BB contents with the transformed
sequence. */
diff --git a/gcc/config/avr/avr-passes.cc b/gcc/config/avr/avr-passes.cc
index 2c21e7be7ab..55785b8b700 100644
--- a/gcc/config/avr/avr-passes.cc
+++ b/gcc/config/avr/avr-passes.cc
@@ -3167,8 +3167,7 @@ bbinfo_t::optimize_one_block (bool &changed)
|| (bbinfo_t::try_split_any_p && od.try_split_any (this))
|| (bbinfo_t::try_mem0_p && od.try_mem0 (this)));
- rtx_insn *new_insns = get_insns ();
- end_sequence ();
+ rtx_insn *new_insns = end_sequence ();
gcc_assert (found == (od.n_new_insns >= 0));
@@ -3943,8 +3942,7 @@ avr_parallel_insn_from_insns (rtx_insn *i[5])
PATTERN (i[3]), PATTERN (i[4]));
start_sequence ();
emit (gen_rtx_PARALLEL (VOIDmode, vec));
- rtx_insn *insn = get_insns ();
- end_sequence ();
+ rtx_insn *insn = end_sequence ();
return insn;
}
diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
index b192a12671f..f651692536b 100644
--- a/gcc/config/avr/avr.cc
+++ b/gcc/config/avr/avr.cc
@@ -1660,8 +1660,7 @@ avr_prologue_setup_frame (HOST_WIDE_INT size,
HARD_REG_SET set)
-size_cfa)));
}
- fp_plus_insns = get_insns ();
- end_sequence ();
+ fp_plus_insns = end_sequence ();
/************ Method 2: Adjust Stack pointer ************/
@@ -1693,8 +1692,7 @@ avr_prologue_setup_frame (HOST_WIDE_INT size,
HARD_REG_SET set)
RTX_FRAME_RELATED_P (insn) = 1;
}
- sp_plus_insns = get_insns ();
- end_sequence ();
+ sp_plus_insns = end_sequence ();
/************ Use shortest method ************/
@@ -2060,8 +2058,7 @@ avr_expand_epilogue (bool sibcall_p)
emit_insn (gen_movhi_sp_r (stack_pointer_rtx, fp,
GEN_INT (irq_state)));
- rtx_insn *fp_plus_insns = get_insns ();
- end_sequence ();
+ rtx_insn *fp_plus_insns = end_sequence ();
/********** Method 2: Adjust Stack pointer **********/
@@ -2072,8 +2069,7 @@ avr_expand_epilogue (bool sibcall_p)
emit_move_insn (stack_pointer_rtx,
plus_constant (Pmode, stack_pointer_rtx, size));
- rtx_insn *sp_plus_insns = get_insns ();
- end_sequence ();
+ rtx_insn *sp_plus_insns = end_sequence ();
/************ Use shortest method ************/
diff --git a/gcc/config/bfin/bfin.cc b/gcc/config/bfin/bfin.cc
index 6de22a45d11..2cf4e77772a 100644
--- a/gcc/config/bfin/bfin.cc
+++ b/gcc/config/bfin/bfin.cc
@@ -3784,8 +3784,7 @@ hwloop_optimize (hwloop_info loop)
}
}
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
if (loop->incoming_src)
{
diff --git a/gcc/config/c6x/c6x.cc b/gcc/config/c6x/c6x.cc
index eebff17e05e..695a97eab0d 100644
--- a/gcc/config/c6x/c6x.cc
+++ b/gcc/config/c6x/c6x.cc
@@ -1582,8 +1582,7 @@ c6x_expand_compare (rtx comparison, machine_mode mode)
cmp = emit_library_call_value (libfunc, 0, LCT_CONST, SImode,
op0, op_mode, op1, op_mode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_libcall_block (insns, cmp, cmp,
gen_rtx_fmt_ee (code, SImode, op0, op1));
diff --git a/gcc/config/cris/cris.cc b/gcc/config/cris/cris.cc
index 42d616a3732..a34c9e9743c 100644
--- a/gcc/config/cris/cris.cc
+++ b/gcc/config/cris/cris.cc
@@ -2692,8 +2692,7 @@ cris_split_movdx (rtx *operands)
else
internal_error ("unknown dest");
- val = get_insns ();
- end_sequence ();
+ val = end_sequence ();
return val;
}
diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index 0c90c0ee37a..8fe79f5acd8 100644
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -539,8 +539,7 @@ (define_expand "movdi"
operand_subword (op1, 0, 1, DImode));
emit_move_insn (operand_subword (op0, 1, 1, DImode),
operand_subword (op1, 1, 1, DImode));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
DONE;
diff --git a/gcc/config/csky/csky.cc b/gcc/config/csky/csky.cc
index 16db497cad6..9888af169c1 100644
--- a/gcc/config/csky/csky.cc
+++ b/gcc/config/csky/csky.cc
@@ -2899,8 +2899,7 @@ csky_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int
reloc)
*valuep = emit_library_call_value (get_tls_get_addr (),
NULL_RTX, LCT_PURE, /* LCT_CONST? */
Pmode, reg, Pmode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
return insns;
}
diff --git a/gcc/config/epiphany/resolve-sw-modes.cc
b/gcc/config/epiphany/resolve-sw-modes.cc
index 8ead53146a0..12068394510 100644
--- a/gcc/config/epiphany/resolve-sw-modes.cc
+++ b/gcc/config/epiphany/resolve-sw-modes.cc
@@ -169,8 +169,7 @@ pass_resolve_sw_modes::execute (function *fun)
emit_set_fp_mode (EPIPHANY_MSW_ENTITY_ROUND_UNKNOWN,
jilted_mode, FP_MODE_NONE,
reg_class_contents[NO_REGS]);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
need_commit = true;
insert_insn_on_edge (seq, e);
}
diff --git a/gcc/config/fr30/fr30.cc b/gcc/config/fr30/fr30.cc
index b956a4c186f..8dd7961c151 100644
--- a/gcc/config/fr30/fr30.cc
+++ b/gcc/config/fr30/fr30.cc
@@ -976,8 +976,7 @@ fr30_move_double (rtx * operands)
/* This should have been prevented by the constraints on movdi_insn. */
gcc_unreachable ();
- val = get_insns ();
- end_sequence ();
+ val = end_sequence ();
return val;
}
diff --git a/gcc/config/frv/frv.cc b/gcc/config/frv/frv.cc
index e53a0a0d8e9..e52bd594cf0 100644
--- a/gcc/config/frv/frv.cc
+++ b/gcc/config/frv/frv.cc
@@ -4759,8 +4759,7 @@ frv_split_scc (rtx dest, rtx test, rtx cc_reg, rtx
cr_reg, HOST_WIDE_INT value)
gen_rtx_SET (dest, const0_rtx)));
/* Finish up, return sequence. */
- ret = get_insns ();
- end_sequence ();
+ ret = end_sequence ();
return ret;
}
@@ -4931,8 +4930,7 @@ frv_split_cond_move (rtx operands[])
}
/* Finish up, return sequence. */
- ret = get_insns ();
- end_sequence ();
+ ret = end_sequence ();
return ret;
}
@@ -5062,8 +5060,7 @@ frv_split_minmax (rtx operands[])
}
/* Finish up, return sequence. */
- ret = get_insns ();
- end_sequence ();
+ ret = end_sequence ();
return ret;
}
@@ -5101,8 +5098,7 @@ frv_split_abs (rtx operands[])
gen_rtx_SET (dest, src)));
/* Finish up, return sequence. */
- ret = get_insns ();
- end_sequence ();
+ ret = end_sequence ();
return ret;
}
diff --git a/gcc/config/frv/frv.md b/gcc/config/frv/frv.md
index 1d8b8aeae05..8ecc633e925 100644
--- a/gcc/config/frv/frv.md
+++ b/gcc/config/frv/frv.md
@@ -2009,8 +2009,7 @@ (define_split
gen_rtx_NE (CC_CCRmode, icr, const0_rtx),
gen_rtx_SET (dest, const0_rtx)));
- operands[3] = get_insns ();
- end_sequence ();
+ operands[3] = end_sequence ();
}")
;; Reload CC_UNSmode for unsigned integer comparisons
@@ -2074,8 +2073,7 @@ (define_split
gen_rtx_NE (CC_CCRmode, icr, const0_rtx),
gen_rtx_SET (dest, const0_rtx)));
- operands[3] = get_insns ();
- end_sequence ();
+ operands[3] = end_sequence ();
}")
;; Reload CC_NZmode. This is mostly the same as the CCmode and CC_UNSmode
@@ -2245,8 +2243,7 @@ (define_split
emit_insn (gen_andsi3 (int_op0, int_op0, GEN_INT (CC_MASK)));
- operands[2] = get_insns ();
- end_sequence ();
+ operands[2] = end_sequence ();
}")
;; Move a gpr value to FCC.
@@ -2329,8 +2326,7 @@ (define_split
const0_rtx),
gen_rtx_SET (int_op0, const0_rtx)));
- operands[2] = get_insns ();
- end_sequence ();
+ operands[2] = end_sequence ();
}")
(define_split
@@ -2357,8 +2353,7 @@ (define_split
if (! ICR_P (REGNO (operands[0])))
emit_insn (gen_movcc_ccr (operands[0], icr));
- operands[2] = get_insns ();
- end_sequence ();
+ operands[2] = end_sequence ();
}")
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index 687bb4ee6c1..f982dbd7bcf 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -3096,8 +3096,7 @@ move_callee_saved_registers (rtx sp, machine_function
*offsets,
saved_scalars++;
}
- rtx move_scalars = get_insns ();
- end_sequence ();
+ rtx move_scalars = end_sequence ();
start_sequence ();
/* Ensure that all vector lanes are moved. */
@@ -3232,8 +3231,7 @@ move_callee_saved_registers (rtx sp, machine_function
*offsets,
offset += size;
}
- rtx move_vectors = get_insns ();
- end_sequence ();
+ rtx move_vectors = end_sequence ();
if (prologue)
{
@@ -3360,8 +3358,7 @@ gcn_expand_prologue ()
+ offsets->callee_saves))));
}
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn (seq);
}
@@ -5860,8 +5857,7 @@ gcn_restore_exec (rtx_insn *insn, rtx_insn
*last_exec_def, int64_t curr_exec,
{
start_sequence ();
emit_move_insn (exec_save_reg, exec_reg);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn_after (seq, last_exec_def);
if (dump_file && (dump_flags & TDF_DETAILS))
@@ -5877,8 +5873,7 @@ gcn_restore_exec (rtx_insn *insn, rtx_insn
*last_exec_def, int64_t curr_exec,
/* Restore EXEC register before the usage. */
start_sequence ();
emit_move_insn (exec_reg, exec);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn_before (seq, insn);
if (dump_file && (dump_flags & TDF_DETAILS))
@@ -6039,8 +6034,7 @@ gcn_md_reorg (void)
{
start_sequence ();
emit_move_insn (exec_reg, GEN_INT (new_exec));
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn_before (seq, insn);
if (dump_file && (dump_flags & TDF_DETAILS))
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 7f0fdb6fa9e..ae817d851f0 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -3396,8 +3396,7 @@ ix86_expand_carry_flag_compare (enum rtx_code code, rtx
op0, rtx op1, rtx *pop)
too common scenario. */
start_sequence ();
compare_op = ix86_expand_fp_compare (code, op0, op1);
- compare_seq = get_insns ();
- end_sequence ();
+ compare_seq = end_sequence ();
if (GET_MODE (XEXP (compare_op, 0)) == CCFPmode)
code = ix86_fp_compare_code_to_integer (GET_CODE (compare_op));
@@ -3561,8 +3560,7 @@ ix86_expand_int_movcc (rtx operands[])
start_sequence ();
compare_op = ix86_expand_compare (code, op0, op1);
- compare_seq = get_insns ();
- end_sequence ();
+ compare_seq = end_sequence ();
compare_code = GET_CODE (compare_op);
@@ -16403,8 +16401,7 @@ ix86_vector_duplicate_value (machine_mode mode, rtx
target, rtx val)
if (GET_MODE (reg) != innermode)
reg = gen_lowpart (innermode, reg);
SET_SRC (PATTERN (insn)) = gen_vec_duplicate (mode, reg);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
if (seq)
emit_insn_before (seq, insn);
@@ -22099,8 +22096,7 @@ expand_vec_perm_interleave2 (struct expand_vec_perm_d
*d)
V4SImode this *will* succeed. For V8HImode or V16QImode it may not. */
start_sequence ();
ok = expand_vec_perm_1 (&dfinal);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
if (!ok)
return false;
@@ -22436,8 +22432,7 @@ expand_vec_perm_vperm2f128_vblend (struct
expand_vec_perm_d *d)
start_sequence ();
ok = expand_vec_perm_1 (&dfirst);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
if (!ok)
return false;
@@ -22545,8 +22540,7 @@ expand_vec_perm_2perm_interleave (struct
expand_vec_perm_d *d, bool two_insn)
{
start_sequence ();
ok = expand_vec_perm_1 (&dfirst);
- seq1 = get_insns ();
- end_sequence ();
+ seq1 = end_sequence ();
if (!ok)
return false;
@@ -22556,8 +22550,7 @@ expand_vec_perm_2perm_interleave (struct
expand_vec_perm_d *d, bool two_insn)
{
start_sequence ();
ok = expand_vec_perm_1 (&dsecond);
- seq2 = get_insns ();
- end_sequence ();
+ seq2 = end_sequence ();
if (!ok)
return false;
@@ -22671,8 +22664,7 @@ expand_vec_perm_2perm_pblendv (struct expand_vec_perm_d
*d, bool two_insn)
{
start_sequence ();
ok = expand_vec_perm_1 (&dfirst);
- seq1 = get_insns ();
- end_sequence ();
+ seq1 = end_sequence ();
if (!ok)
return false;
@@ -22682,8 +22674,7 @@ expand_vec_perm_2perm_pblendv (struct expand_vec_perm_d
*d, bool two_insn)
{
start_sequence ();
ok = expand_vec_perm_1 (&dsecond);
- seq2 = get_insns ();
- end_sequence ();
+ seq2 = end_sequence ();
if (!ok)
return false;
@@ -22877,8 +22868,7 @@ expand_vec_perm2_vperm2f128_vblend (struct
expand_vec_perm_d *d)
canonicalize_perm (&dfirst);
start_sequence ();
ok = ix86_expand_vec_perm_const_1 (&dfirst);
- seq1 = get_insns ();
- end_sequence ();
+ seq1 = end_sequence ();
if (!ok)
return false;
@@ -22886,8 +22876,7 @@ expand_vec_perm2_vperm2f128_vblend (struct
expand_vec_perm_d *d)
canonicalize_perm (&dsecond);
start_sequence ();
ok = ix86_expand_vec_perm_const_1 (&dsecond);
- seq2 = get_insns ();
- end_sequence ();
+ seq2 = end_sequence ();
if (!ok)
return false;
@@ -26114,8 +26103,7 @@ ix86_gen_ccmp_first (rtx_insn **prep_seq, rtx_insn
**gen_seq,
}
}
- *prep_seq = get_insns ();
- end_sequence ();
+ *prep_seq = end_sequence ();
start_sequence ();
@@ -26126,8 +26114,7 @@ ix86_gen_ccmp_first (rtx_insn **prep_seq, rtx_insn
**gen_seq,
end_sequence ();
return NULL_RTX;
}
- *gen_seq = get_insns ();
- end_sequence ();
+ *gen_seq = end_sequence ();
return res;
}
@@ -26170,8 +26157,7 @@ ix86_gen_ccmp_next (rtx_insn **prep_seq, rtx_insn
**gen_seq, rtx prev,
return NULL_RTX;
}
- *prep_seq = get_insns ();
- end_sequence ();
+ *prep_seq = end_sequence ();
target = gen_rtx_REG (cc_mode, FLAGS_REG);
dfv = ix86_get_flags_cc ((rtx_code) cmp_code);
@@ -26202,8 +26188,7 @@ ix86_gen_ccmp_next (rtx_insn **prep_seq, rtx_insn
**gen_seq, rtx prev,
return NULL_RTX;
}
- *gen_seq = get_insns ();
- end_sequence ();
+ *gen_seq = end_sequence ();
return gen_rtx_fmt_ee ((rtx_code) cmp_code, VOIDmode, target, const0_rtx);
}
diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc
index 6491c6b063f..b1682c2fad4 100644
--- a/gcc/config/i386/i386-features.cc
+++ b/gcc/config/i386/i386-features.cc
@@ -948,8 +948,7 @@ scalar_chain::make_vector_copies (rtx_insn *insn, rtx reg)
else
emit_insn (gen_rtx_SET (gen_rtx_SUBREG (vmode, vreg, 0),
gen_gpr_to_xmm_move_src (vmode, reg)));
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_conversion_insns (seq, insn);
if (dump_file)
@@ -1016,8 +1015,7 @@ scalar_chain::convert_reg (rtx_insn *insn, rtx dst, rtx
src)
else
emit_move_insn (dst, src);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_conversion_insns (seq, insn);
if (dump_file)
@@ -1112,8 +1110,7 @@ scalar_chain::convert_op (rtx *op, rtx_insn *insn)
{
start_sequence ();
vec_cst = validize_mem (force_const_mem (vmode, vec_cst));
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn_before (seq, insn);
}
@@ -1929,8 +1926,7 @@ timode_scalar_chain::convert_insn (rtx_insn *insn)
src = validize_mem (force_const_mem (V1TImode, src));
use_move = MEM_P (dst);
}
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
if (seq)
emit_insn_before (seq, insn);
if (use_move)
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index d55c418b88c..7f610410025 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -1795,8 +1795,7 @@ ix86_init_pic_reg (void)
add_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL_RTX);
}
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
entry_edge = single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun));
insert_insn_on_edge (seq, entry_edge);
@@ -4739,8 +4738,7 @@ ix86_va_start (tree valist, rtx nextarg)
start_sequence ();
emit_move_insn (reg, gen_rtx_REG (Pmode, scratch_regno));
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
push_topmost_sequence ();
emit_insn_after (seq, entry_of_function ());
@@ -7981,8 +7979,7 @@ ix86_get_drap_rtx (void)
start_sequence ();
drap_vreg = copy_to_reg (arg_ptr);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
insn = emit_insn_before (seq, NEXT_INSN (entry_of_function ()));
if (!optimize)
@@ -12474,8 +12471,7 @@ legitimize_tls_address (rtx x, enum tls_model model,
bool for_mov)
start_sequence ();
emit_call_insn
(gen_tls_global_dynamic_64 (Pmode, rax, x, caddr));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (GET_MODE (x) != Pmode)
x = gen_rtx_ZERO_EXTEND (Pmode, x);
@@ -12529,8 +12525,7 @@ legitimize_tls_address (rtx x, enum tls_model model,
bool for_mov)
start_sequence ();
emit_call_insn
(gen_tls_local_dynamic_base_64 (Pmode, rax, caddr));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
/* Attach a unique REG_EQUAL, to allow the RTL optimizers to
share the LD_BASE result with other LD model accesses. */
@@ -24823,8 +24818,7 @@ ix86_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &
/*inputs*/,
}
}
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
if (saw_asm_flag)
return seq;
diff --git a/gcc/config/ia64/ia64.cc b/gcc/config/ia64/ia64.cc
index 91b7310b656..8dab9279fe7 100644
--- a/gcc/config/ia64/ia64.cc
+++ b/gcc/config/ia64/ia64.cc
@@ -1241,8 +1241,7 @@ ia64_expand_tls_address (enum tls_model tls_kind, rtx
op0, rtx op1,
LCT_CONST, Pmode,
tga_op1, Pmode, tga_op2, Pmode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (GET_MODE (op0) != Pmode)
op0 = tga_ret;
@@ -1265,8 +1264,7 @@ ia64_expand_tls_address (enum tls_model tls_kind, rtx
op0, rtx op1,
LCT_CONST, Pmode,
tga_op1, Pmode, tga_op2, Pmode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
tga_eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
UNSPEC_LD_BASE);
@@ -1879,8 +1877,7 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1)
emit_insn (gen_rtx_SET (cmp, gen_rtx_fmt_ee (ncode, BImode,
ret, const0_rtx)));
- rtx_insn *insns = get_insns ();
- end_sequence ();
+ rtx_insn *insns = end_sequence ();
emit_libcall_block (insns, cmp, cmp,
gen_rtx_fmt_ee (code, BImode, *op0, *op1));
@@ -3174,8 +3171,7 @@ spill_restore_mem (rtx reg, HOST_WIDE_INT cfa_off)
spill_fill_data.init_reg[iter],
disp_rtx));
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
}
/* Careful for being the first insn in a sequence. */
@@ -11711,8 +11707,7 @@ expand_vec_perm_interleave_2 (struct expand_vec_perm_d
*d)
this *will* succeed. For V8QImode or V2SImode it may not. */
start_sequence ();
ok = expand_vec_perm_1 (&dfinal);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
if (!ok)
return false;
if (d->testing_p)
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 7533e53839f..f62e4163c71 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -2948,9 +2948,7 @@ loongarch_call_tls_get_addr (rtx sym, enum
loongarch_symbol_type type, rtx v0)
RTL_CONST_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), a0);
- insn = get_insns ();
-
- end_sequence ();
+ insn = end_sequence ();
return insn;
}
diff --git a/gcc/config/m32r/m32r.cc b/gcc/config/m32r/m32r.cc
index a96634c2f57..75db2808da3 100644
--- a/gcc/config/m32r/m32r.cc
+++ b/gcc/config/m32r/m32r.cc
@@ -1150,8 +1150,7 @@ gen_split_move_double (rtx operands[])
else
gcc_unreachable ();
- val = get_insns ();
- end_sequence ();
+ val = end_sequence ();
return val;
}
diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md
index 309d8950aba..393e0dabce1 100644
--- a/gcc/config/m32r/m32r.md
+++ b/gcc/config/m32r/m32r.md
@@ -1554,8 +1554,7 @@ (define_split
start_sequence ();
emit_insn (gen_cmp_ltusi_insn (op1, const1_rtx));
emit_insn (gen_movcc_insn (op0));
- operands[3] = get_insns ();
- end_sequence ();
+ operands[3] = end_sequence ();
}")
(define_insn "seq_insn"
@@ -1607,8 +1606,7 @@ (define_split
emit_insn (gen_cmp_ltusi_insn (op3, const1_rtx));
emit_insn (gen_movcc_insn (op0));
- operands[4] = get_insns ();
- end_sequence ();
+ operands[4] = end_sequence ();
}")
(define_insn "sne_zero_insn"
diff --git a/gcc/config/m68k/m68k.cc b/gcc/config/m68k/m68k.cc
index d8fa6e00de1..800a385a011 100644
--- a/gcc/config/m68k/m68k.cc
+++ b/gcc/config/m68k/m68k.cc
@@ -2763,8 +2763,7 @@ m68k_call_tls_get_addr (rtx x, rtx eqv, enum m68k_reloc
reloc)
Pmode, x, Pmode);
m68k_libcall_value_in_a0_p = false;
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
gcc_assert (can_create_pseudo_p ());
dest = gen_reg_rtx (Pmode);
@@ -2811,8 +2810,7 @@ m68k_call_m68k_read_tp (void)
a0 = emit_library_call_value (m68k_get_m68k_read_tp (), NULL_RTX, LCT_PURE,
Pmode);
m68k_libcall_value_in_a0_p = false;
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
/* Attach a unique REG_EQUIV, to allow the RTL optimizers to
share the m68k_read_tp result with other IE/LE model accesses. */
@@ -6799,8 +6797,7 @@ m68k_sched_md_init_global (FILE *sched_dump
ATTRIBUTE_UNUSED,
start_sequence ();
emit_insn (gen_ib ());
- sched_ib.insn = get_insns ();
- end_sequence ();
+ sched_ib.insn = end_sequence ();
}
/* Scheduling pass is now finished. Free/reset static variables. */
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 35bf1c683c5..c96937f0b2c 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -4098,8 +4098,7 @@ (define_expand "negdf2"
emit_move_insn (operand_subword (operands[0], 1, 1, DFmode),
operand_subword_force (operands[1], 1, DFmode));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
DONE;
@@ -4132,8 +4131,7 @@ (define_expand "negxf2"
emit_move_insn (operand_subword (operands[0], 2, 1, XFmode),
operand_subword_force (operands[1], 2, XFmode));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
DONE;
@@ -4251,8 +4249,7 @@ (define_expand "absdf2"
emit_move_insn (operand_subword (operands[0], 1, 1, DFmode),
operand_subword_force (operands[1], 1, DFmode));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
DONE;
@@ -4285,8 +4282,7 @@ (define_expand "absxf2"
emit_move_insn (operand_subword (operands[0], 2, 1, XFmode),
operand_subword_force (operands[1], 2, XFmode));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
DONE;
diff --git a/gcc/config/microblaze/microblaze.cc
b/gcc/config/microblaze/microblaze.cc
index fc223fb08e1..db8e33465a8 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -585,8 +585,7 @@ microblaze_call_tls_get_addr (rtx x, rtx reg, rtx *valuep,
int reloc)
LCT_PURE, /* LCT_CONST? */
Pmode, reg, Pmode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
return insns;
}
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 24a28dcf817..81eaa3cfb2a 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -3621,9 +3621,7 @@ mips_call_tls_get_addr (rtx sym, enum mips_symbol_type
type, rtx v0)
const0_rtx, NULL_RTX, false);
RTL_CONST_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), a0);
- insn = get_insns ();
-
- end_sequence ();
+ insn = end_sequence ();
return insn;
}
@@ -15167,23 +15165,19 @@ mips_ls2_init_dfa_post_cycle_insn (void)
{
start_sequence ();
emit_insn (gen_ls2_alu1_turn_enabled_insn ());
- mips_ls2.alu1_turn_enabled_insn = get_insns ();
- end_sequence ();
+ mips_ls2.alu1_turn_enabled_insn = end_sequence ();
start_sequence ();
emit_insn (gen_ls2_alu2_turn_enabled_insn ());
- mips_ls2.alu2_turn_enabled_insn = get_insns ();
- end_sequence ();
+ mips_ls2.alu2_turn_enabled_insn = end_sequence ();
start_sequence ();
emit_insn (gen_ls2_falu1_turn_enabled_insn ());
- mips_ls2.falu1_turn_enabled_insn = get_insns ();
- end_sequence ();
+ mips_ls2.falu1_turn_enabled_insn = end_sequence ();
start_sequence ();
emit_insn (gen_ls2_falu2_turn_enabled_insn ());
- mips_ls2.falu2_turn_enabled_insn = get_insns ();
- end_sequence ();
+ mips_ls2.falu2_turn_enabled_insn = end_sequence ();
mips_ls2.alu1_core_unit_code = get_cpu_unit_code ("ls2_alu1_core");
mips_ls2.alu2_core_unit_code = get_cpu_unit_code ("ls2_alu2_core");
@@ -19892,8 +19886,7 @@ mips16_split_long_branches (void)
emit_label (new_label);
}
- jump_sequence = get_insns ();
- end_sequence ();
+ jump_sequence = end_sequence ();
emit_insn_after (jump_sequence, jump_insn);
if (new_label)
diff --git a/gcc/config/nvptx/nvptx.cc b/gcc/config/nvptx/nvptx.cc
index b1c476e95f4..a92a1e391c6 100644
--- a/gcc/config/nvptx/nvptx.cc
+++ b/gcc/config/nvptx/nvptx.cc
@@ -2045,8 +2045,7 @@ nvptx_gen_shuffle (rtx dst, rtx src, rtx idx,
nvptx_shuffle_kind kind)
start_sequence ();
emit_insn (nvptx_gen_shuffle (dst_real, src_real, idx, kind));
emit_insn (nvptx_gen_shuffle (dst_imag, src_imag, idx, kind));
- res = get_insns ();
- end_sequence ();
+ res = end_sequence ();
}
break;
case E_SImode:
@@ -2066,8 +2065,7 @@ nvptx_gen_shuffle (rtx dst, rtx src, rtx idx,
nvptx_shuffle_kind kind)
emit_insn (nvptx_gen_shuffle (tmp0, tmp0, idx, kind));
emit_insn (nvptx_gen_shuffle (tmp1, tmp1, idx, kind));
emit_insn (nvptx_gen_pack (dst, tmp0, tmp1));
- res = get_insns ();
- end_sequence ();
+ res = end_sequence ();
}
break;
case E_V2SImode:
@@ -2085,8 +2083,7 @@ nvptx_gen_shuffle (rtx dst, rtx src, rtx idx,
nvptx_shuffle_kind kind)
emit_insn (nvptx_gen_shuffle (tmp1, tmp1, idx, kind));
emit_insn (gen_movsi (dst0, tmp0));
emit_insn (gen_movsi (dst1, tmp1));
- res = get_insns ();
- end_sequence ();
+ res = end_sequence ();
}
break;
case E_V2DImode:
@@ -2104,8 +2101,7 @@ nvptx_gen_shuffle (rtx dst, rtx src, rtx idx,
nvptx_shuffle_kind kind)
emit_insn (nvptx_gen_shuffle (tmp1, tmp1, idx, kind));
emit_insn (gen_movdi (dst0, tmp0));
emit_insn (gen_movdi (dst1, tmp1));
- res = get_insns ();
- end_sequence ();
+ res = end_sequence ();
}
break;
case E_BImode:
@@ -2116,8 +2112,7 @@ nvptx_gen_shuffle (rtx dst, rtx src, rtx idx,
nvptx_shuffle_kind kind)
emit_insn (gen_sel_truesi (tmp, src, GEN_INT (1), const0_rtx));
emit_insn (nvptx_gen_shuffle (tmp, tmp, idx, kind));
emit_insn (gen_rtx_SET (dst, gen_rtx_NE (BImode, tmp, const0_rtx)));
- res = get_insns ();
- end_sequence ();
+ res = end_sequence ();
}
break;
case E_QImode:
@@ -2130,8 +2125,7 @@ nvptx_gen_shuffle (rtx dst, rtx src, rtx idx,
nvptx_shuffle_kind kind)
emit_insn (nvptx_gen_shuffle (tmp, tmp, idx, kind));
emit_insn (gen_rtx_SET (dst, gen_rtx_fmt_e (TRUNCATE, GET_MODE (dst),
tmp)));
- res = get_insns ();
- end_sequence ();
+ res = end_sequence ();
}
break;
@@ -2194,8 +2188,7 @@ nvptx_gen_shared_bcast (rtx reg, propagate_mask pm,
unsigned rep,
emit_insn (nvptx_gen_shared_bcast (tmp, pm, rep, data, vector));
if (pm & PM_write)
emit_insn (gen_rtx_SET (reg, gen_rtx_NE (BImode, tmp, const0_rtx)));
- res = get_insns ();
- end_sequence ();
+ res = end_sequence ();
}
break;
@@ -2231,8 +2224,7 @@ nvptx_gen_shared_bcast (rtx reg, propagate_mask pm,
unsigned rep,
emit_insn (res);
emit_insn (gen_adddi3 (data->ptr, data->ptr,
GEN_INT (GET_MODE_SIZE (GET_MODE (reg)))));
- res = get_insns ();
- end_sequence ();
+ res = end_sequence ();
}
else
rep = 1;
@@ -4603,8 +4595,7 @@ nvptx_propagate (bool is_call, basic_block block,
rtx_insn *insn,
}
emit_insn (gen_rtx_CLOBBER (GET_MODE (tmp), tmp));
emit_insn (gen_rtx_CLOBBER (GET_MODE (ptr), ptr));
- rtx cpy = get_insns ();
- end_sequence ();
+ rtx cpy = end_sequence ();
insn = emit_insn_after (cpy, insn);
}
@@ -5609,8 +5600,7 @@ workaround_uninit_method_1 (void)
if (nvptx_comment && first != NULL)
emit_insn (gen_comment ("Start: Added by -minit-regs=1"));
emit_move_insn (reg, CONST0_RTX (GET_MODE (reg)));
- rtx_insn *inits = get_insns ();
- end_sequence ();
+ rtx_insn *inits = end_sequence ();
if (dump_file && (dump_flags & TDF_DETAILS))
for (rtx_insn *init = inits; init != NULL; init = NEXT_INSN (init))
@@ -5666,8 +5656,7 @@ workaround_uninit_method_2 (void)
if (nvptx_comment && first != NULL)
emit_insn (gen_comment ("Start: Added by -minit-regs=2:"));
emit_move_insn (reg, CONST0_RTX (GET_MODE (reg)));
- rtx_insn *inits = get_insns ();
- end_sequence ();
+ rtx_insn *inits = end_sequence ();
if (dump_file && (dump_flags & TDF_DETAILS))
for (rtx_insn *init = inits; init != NULL; init = NEXT_INSN (init))
@@ -5737,8 +5726,7 @@ workaround_uninit_method_3 (void)
start_sequence ();
emit_move_insn (reg, CONST0_RTX (GET_MODE (reg)));
- rtx_insn *inits = get_insns ();
- end_sequence ();
+ rtx_insn *inits = end_sequence ();
if (dump_file && (dump_flags & TDF_DETAILS))
for (rtx_insn *init = inits; init != NULL;
@@ -5769,8 +5757,7 @@ workaround_uninit_method_3 (void)
emit_insn (gen_comment ("Start: Added by -minit-regs=3:"));
emit_insn (e->insns.r);
emit_insn (gen_comment ("End: Added by -minit-regs=3:"));
- e->insns.r = get_insns ();
- end_sequence ();
+ e->insns.r = end_sequence ();
}
}
diff --git a/gcc/config/or1k/or1k.cc b/gcc/config/or1k/or1k.cc
index aa486aa0863..62e2168e0ee 100644
--- a/gcc/config/or1k/or1k.cc
+++ b/gcc/config/or1k/or1k.cc
@@ -460,8 +460,7 @@ or1k_init_pic_reg (void)
cfun->machine->set_got_insn =
emit_insn (gen_set_got_tmp (pic_offset_table_rtx));
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
edge entry_edge = single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun));
insert_insn_on_edge (seq, entry_edge);
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index 9542d3b7d3c..b63ccf1982f 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -1123,8 +1123,7 @@ legitimize_tls_address (rtx addr)
else
emit_insn (gen_tld_load (tmp, addr));
t1 = hppa_tls_call (tmp);
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
t2 = gen_reg_rtx (Pmode);
emit_libcall_block (insn, t2, t1,
gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
diff --git a/gcc/config/pru/pru.cc b/gcc/config/pru/pru.cc
index 63191083644..47e5f248ce7 100644
--- a/gcc/config/pru/pru.cc
+++ b/gcc/config/pru/pru.cc
@@ -1040,8 +1040,7 @@ pru_expand_fp_compare (rtx comparison, machine_mode mode)
cmp = emit_library_call_value (libfunc, 0, LCT_CONST, SImode,
op0, op_mode, op1, op_mode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_libcall_block (insns, cmp, cmp,
gen_rtx_fmt_ee (code, SImode, op0, op1));
@@ -2919,8 +2918,7 @@ pru_reorg_loop (rtx_insn *insns)
LABEL_NUSES (end->label)++;
/* Emit the whole sequence before the doloop_end. */
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
emit_insn_before (insn, end->insn);
/* Delete the doloop_end. */
diff --git a/gcc/config/riscv/riscv-shorten-memrefs.cc
b/gcc/config/riscv/riscv-shorten-memrefs.cc
index 60f330e656e..2e3d9f6a2c3 100644
--- a/gcc/config/riscv/riscv-shorten-memrefs.cc
+++ b/gcc/config/riscv/riscv-shorten-memrefs.cc
@@ -189,8 +189,7 @@ pass_shorten_memrefs::transform (regno_map *m, basic_block
bb)
}
}
}
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn_before (seq, insn);
}
}
diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index a8c92565541..4891b6c95e8 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -3419,8 +3419,7 @@ pre_vsetvl::emit_vsetvl ()
}
start_sequence ();
insert_vsetvl_insn (EMIT_DIRECT, footer_info);
- rtx_insn *rinsn = get_insns ();
- end_sequence ();
+ rtx_insn *rinsn = end_sequence ();
default_rtl_profile ();
insert_insn_on_edge (rinsn, eg);
need_commit = true;
@@ -3451,8 +3450,7 @@ pre_vsetvl::emit_vsetvl ()
start_sequence ();
insert_vsetvl_insn (EMIT_DIRECT, info);
- rtx_insn *rinsn = get_insns ();
- end_sequence ();
+ rtx_insn *rinsn = end_sequence ();
default_rtl_profile ();
/* We should not get an abnormal edge here. */
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index d996965d095..796f298da7a 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -2856,9 +2856,7 @@ riscv_call_tls_get_addr (rtx sym, rtx result)
gen_int_mode (RISCV_CC_BASE, SImode)));
RTL_CONST_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), a0);
- insn = get_insns ();
-
- end_sequence ();
+ insn = end_sequence ();
return insn;
}
@@ -12179,8 +12177,7 @@ riscv_frm_emit_after_bb_end (rtx_insn *cur_insn)
{
start_sequence ();
emit_insn (gen_frrmsi (DYNAMIC_FRM_RTL (cfun)));
- rtx_insn *backup_insn = get_insns ();
- end_sequence ();
+ rtx_insn *backup_insn = end_sequence ();
insert_insn_on_edge (backup_insn, eg);
}
@@ -12190,8 +12187,7 @@ riscv_frm_emit_after_bb_end (rtx_insn *cur_insn)
{
start_sequence ();
emit_insn (gen_frrmsi (DYNAMIC_FRM_RTL (cfun)));
- rtx_insn *backup_insn = get_insns ();
- end_sequence ();
+ rtx_insn *backup_insn = end_sequence ();
insert_insn_end_basic_block (backup_insn, bb);
}
diff --git a/gcc/config/rl78/rl78.cc b/gcc/config/rl78/rl78.cc
index 09753b69ca0..28728aa13d3 100644
--- a/gcc/config/rl78/rl78.cc
+++ b/gcc/config/rl78/rl78.cc
@@ -4953,8 +4953,7 @@ rl78_emit_libcall (const char *name, enum rtx_code code,
gcc_unreachable ();
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_libcall_block (insns, operands[0], ret, equiv);
return ret;
}
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 12dbde2bc63..7ea37778103 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -9259,8 +9259,7 @@ rs6000_debug_legitimize_address (rtx x, rtx oldx,
machine_mode mode)
start_sequence ();
ret = rs6000_legitimize_address (x, oldx, mode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (ret != x)
{
diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index 2d44cecfeed..38267202f66 100644
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -5589,8 +5589,7 @@ legitimize_tls_address (rtx addr, rtx reg)
new_rtx = force_const_mem (Pmode, new_rtx);
emit_move_insn (r2, new_rtx);
s390_emit_tls_call_insn (r2, tls_call);
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
temp = gen_reg_rtx (Pmode);
@@ -5612,8 +5611,7 @@ legitimize_tls_address (rtx addr, rtx reg)
new_rtx = force_const_mem (Pmode, new_rtx);
emit_move_insn (r2, new_rtx);
s390_emit_tls_call_insn (r2, tls_call);
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
UNSPEC_TLSLDM_NTPOFF);
temp = gen_reg_rtx (Pmode);
@@ -7869,8 +7867,7 @@ s390_two_part_insv (struct alignment_context *ac, rtx
*seq1, rtx *seq2,
const0_rtx, ins))
{
*seq1 = NULL;
- *seq2 = get_insns ();
- end_sequence ();
+ *seq2 = end_sequence ();
return tmp;
}
end_sequence ();
@@ -7879,13 +7876,11 @@ s390_two_part_insv (struct alignment_context *ac, rtx
*seq1, rtx *seq2,
/* Failed to use insv. Generate a two part shift and mask. */
start_sequence ();
tmp = s390_expand_mask_and_shift (ins, mode, ac->shift);
- *seq1 = get_insns ();
- end_sequence ();
+ *seq1 = end_sequence ();
start_sequence ();
tmp = expand_simple_binop (SImode, IOR, tmp, val, NULL_RTX, 1, OPTAB_DIRECT);
- *seq2 = get_insns ();
- end_sequence ();
+ *seq2 = end_sequence ();
return tmp;
}
@@ -11811,8 +11806,7 @@ s390_load_got (void)
emit_move_insn (got_rtx, s390_got_symbol ());
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
return insns;
}
@@ -13579,8 +13573,7 @@ s390_va_start (tree valist, rtx nextarg
ATTRIBUTE_UNUSED)
start_sequence ();
emit_move_insn (reg, gen_rtx_REG (Pmode, 1));
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
push_topmost_sequence ();
emit_insn_after (seq, entry_of_function ());
diff --git a/gcc/config/sh/sh_treg_combine.cc b/gcc/config/sh/sh_treg_combine.cc
index 3dbd6c320cf..33f528e0b76 100644
--- a/gcc/config/sh/sh_treg_combine.cc
+++ b/gcc/config/sh/sh_treg_combine.cc
@@ -945,8 +945,7 @@ sh_treg_combine::make_not_reg_insn (rtx dst_reg, rtx
src_reg) const
else
gcc_unreachable ();
- rtx i = get_insns ();
- end_sequence ();
+ rtx i = end_sequence ();
return i;
}
diff --git a/gcc/config/sparc/sparc.cc b/gcc/config/sparc/sparc.cc
index 2196a0c4498..ffd1fb99e0c 100644
--- a/gcc/config/sparc/sparc.cc
+++ b/gcc/config/sparc/sparc.cc
@@ -4762,8 +4762,7 @@ sparc_legitimize_tls_address (rtx addr)
addr, const1_rtx));
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), o0);
RTL_CONST_CALL_P (insn) = 1;
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
emit_libcall_block (insn, ret, o0, addr);
break;
@@ -4782,8 +4781,7 @@ sparc_legitimize_tls_address (rtx addr)
const1_rtx));
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), o0);
RTL_CONST_CALL_P (insn) = 1;
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
/* Attach a unique REG_EQUAL, to allow the RTL optimizers to
share the LD_BASE result with other LD model accesses. */
emit_libcall_block (insn, temp3, o0,
@@ -12530,8 +12528,7 @@ sparc_output_mi_thunk (FILE *file, tree thunk_fndecl
ATTRIBUTE_UNUSED,
if (!TARGET_VXWORKS_RTP)
pic_offset_table_rtx = got_register_rtx;
scratch = sparc_legitimize_pic_address (funexp, scratch);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_and_preserve (seq, spill_reg, pic_offset_table_rtx);
}
else if (TARGET_ARCH32)
@@ -12557,8 +12554,7 @@ sparc_output_mi_thunk (FILE *file, tree thunk_fndecl
ATTRIBUTE_UNUSED,
spill_reg = gen_rtx_REG (DImode, 15); /* %o7 */
start_sequence ();
sparc_emit_set_symbolic_const64 (scratch, funexp, spill_reg);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_and_preserve (seq, spill_reg, 0);
break;
@@ -13242,8 +13238,7 @@ sparc_init_pic_reg (void)
load_got_register ();
if (!TARGET_VXWORKS_RTP)
emit_move_insn (pic_offset_table_rtx, got_register_rtx);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
entry_edge = single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun));
insert_insn_on_edge (seq, entry_edge);
diff --git a/gcc/config/stormy16/stormy16.cc b/gcc/config/stormy16/stormy16.cc
index ba2c8cdbc00..5b92743be73 100644
--- a/gcc/config/stormy16/stormy16.cc
+++ b/gcc/config/stormy16/stormy16.cc
@@ -405,8 +405,7 @@ xstormy16_split_cbranch (machine_mode mode, rtx label, rtx
comparison,
start_sequence ();
xstormy16_expand_arith (mode, COMPARE, dest, op0, op1);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
gcc_assert (INSN_P (seq));
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index 621fb0aeb46..e03dee3f4c4 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -1482,8 +1482,7 @@ xtensa_copy_incoming_a7 (rtx opnd)
if (mode == DFmode || mode == DImode)
emit_insn (gen_movsi_internal (gen_rtx_SUBREG (SImode, tmp, 0),
gen_rtx_REG (SImode, A7_REG - 1)));
- entry_insns = get_insns ();
- end_sequence ();
+ entry_insns = end_sequence ();
if (cfun->machine->vararg_a7)
{
@@ -1644,8 +1643,7 @@ xtensa_expand_block_set_libcall (rtx dst_mem,
GEN_INT (value), SImode,
GEN_INT (bytes), SImode);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
@@ -1706,8 +1704,7 @@ xtensa_expand_block_set_unrolled_loop (rtx dst_mem,
}
while (bytes > 0);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
@@ -1788,8 +1785,7 @@ xtensa_expand_block_set_small_loop (rtx dst_mem,
emit_insn (gen_addsi3 (dst, dst, GEN_INT (align)));
emit_cmp_and_jump_insns (dst, end, NE, const0_rtx, SImode, true, label);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
@@ -2467,8 +2463,7 @@ xtensa_call_tls_desc (rtx sym, rtx *retp)
emit_move_insn (a_io, arg);
call_insn = emit_call_insn (gen_tls_call (a_io, fn, sym, const1_rtx));
use_reg (&CALL_INSN_FUNCTION_USAGE (call_insn), a_io);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
*retp = a_io;
return insns;
diff --git a/gcc/dse.cc b/gcc/dse.cc
index 14f82c364c0..1d756fd849b 100644
--- a/gcc/dse.cc
+++ b/gcc/dse.cc
@@ -814,8 +814,7 @@ emit_inc_dec_insn_before (rtx mem ATTRIBUTE_UNUSED,
{
start_sequence ();
emit_insn (gen_add3_insn (dest, src, srcoff));
- new_insn = get_insns ();
- end_sequence ();
+ new_insn = end_sequence ();
}
else
new_insn = gen_move_insn (dest, src);
@@ -1827,8 +1826,7 @@ find_shift_sequence (poly_int64 access_bytes,
gen_int_shift_amount (new_mode, shift),
new_reg, 1, OPTAB_DIRECT);
- shift_seq = get_insns ();
- end_sequence ();
+ shift_seq = end_sequence ();
if (target != new_reg || shift_seq == NULL)
continue;
@@ -2047,8 +2045,7 @@ replace_read (store_info *store_info, insn_info_t
store_insn,
}
else
read_reg = copy_to_mode_reg (read_mode, read_reg);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (insns != NULL_RTX)
{
diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc
index d86fb23b29a..fc7b6c7e297 100644
--- a/gcc/emit-rtl.cc
+++ b/gcc/emit-rtl.cc
@@ -4611,8 +4611,7 @@ reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn
*after)
start_sequence ();
... emit the new instructions ...
- insns_head = get_insns ();
- end_sequence ();
+ insns_head = end_sequence ();
emit_insn_before (insns_head, SPOT);
@@ -5457,8 +5456,7 @@ gen_clobber (rtx x)
start_sequence ();
emit_clobber (x);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
@@ -5485,8 +5483,7 @@ gen_use (rtx x)
start_sequence ();
emit_use (x);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
diff --git a/gcc/except.cc b/gcc/except.cc
index 0fe1e093489..518095ca572 100644
--- a/gcc/except.cc
+++ b/gcc/except.cc
@@ -1024,8 +1024,7 @@ dw2_build_landing_pads (void)
expand_dw2_landing_pad_for_region (lp->region);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
bb = emit_to_new_bb_before (seq, label_rtx (lp->post_landing_pad));
bb->count = bb->next_bb->count;
@@ -1120,8 +1119,7 @@ sjlj_mark_call_sites (void)
buf_addr = plus_constant (Pmode, XEXP (crtl->eh.sjlj_fc, 0),
sjlj_fc_jbuf_ofs);
expand_builtin_update_setjmp_buf (buf_addr);
- p = get_insns ();
- end_sequence ();
+ p = end_sequence ();
emit_insn_before (p, insn);
}
@@ -1161,8 +1159,7 @@ sjlj_mark_call_sites (void)
mem = adjust_address (crtl->eh.sjlj_fc, TYPE_MODE (integer_type_node),
sjlj_fc_call_site_ofs);
emit_move_insn (mem, gen_int_mode (this_call_site, GET_MODE (mem)));
- p = get_insns ();
- end_sequence ();
+ p = end_sequence ();
emit_insn_before (p, before);
last_call_site = this_call_site;
@@ -1228,8 +1225,7 @@ sjlj_emit_function_enter (rtx_code_label *dispatch_label)
emit_library_call (unwind_sjlj_register_libfunc, LCT_NORMAL, VOIDmode,
XEXP (fc, 0), Pmode);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
/* ??? Instead of doing this at the beginning of the function,
do this in a block that is at loop level 0 and dominates all
@@ -1296,8 +1292,7 @@ sjlj_emit_function_exit (void)
emit_library_call (unwind_sjlj_unregister_libfunc, LCT_NORMAL, VOIDmode,
XEXP (crtl->eh.sjlj_fc, 0), Pmode);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
/* ??? Really this can be done in any block at loop level 0 that
post-dominates all can_throw_internal instructions. This is
@@ -1402,8 +1397,7 @@ sjlj_emit_dispatch_table (rtx_code_label *dispatch_label,
int num_dispatch)
if (r->filter_reg)
emit_move_insn (r->filter_reg, filter_reg);
- seq2 = get_insns ();
- end_sequence ();
+ seq2 = end_sequence ();
rtx_insn *before = label_rtx (lp->post_landing_pad);
bb = emit_to_new_bb_before (seq2, before);
@@ -1439,8 +1433,7 @@ sjlj_emit_dispatch_table (rtx_code_label *dispatch_label,
int num_dispatch)
expand_sjlj_dispatch_table (disp, dispatch_labels);
}
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
bb = emit_to_new_bb_before (seq, first_reachable_label);
if (num_dispatch == 1)
diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index 8cf10d9c73b..72dbafe5d9f 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -3938,8 +3938,7 @@ expmed_mult_highpart_optab (scalar_int_mode mode, rtx
op0, rtx op1,
wop1 = convert_modes (wider_mode, mode, op1, unsignedp);
tem = expand_binop (wider_mode, smul_optab, wop0, wop1, 0,
unsignedp, OPTAB_WIDEN);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (tem)
{
@@ -4182,8 +4181,7 @@ expand_sdiv_pow2 (scalar_int_mode mode, rtx op0,
HOST_WIDE_INT d)
temp, temp2, mode, 0);
if (temp2)
{
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn (seq);
return expand_shift (RSHIFT_EXPR, mode, temp2, logd, NULL_RTX, 0);
}
diff --git a/gcc/expr.cc b/gcc/expr.cc
index 3815c565e2d..0bc2095dae3 100644
--- a/gcc/expr.cc
+++ b/gcc/expr.cc
@@ -471,8 +471,7 @@ convert_mode_scalar (rtx to, rtx from, int unsignedp)
emit_move_insn (to, tof);
}
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (tof)
{
emit_insn (insns);
@@ -542,8 +541,7 @@ convert_mode_scalar (rtx to, rtx from, int unsignedp)
emit_move_insn (to, tof);
}
while (0);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (tof)
{
emit_insn (insns);
@@ -562,8 +560,7 @@ convert_mode_scalar (rtx to, rtx from, int unsignedp)
start_sequence ();
value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
from, from_mode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_libcall_block (insns, to, value,
tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
from)
@@ -736,8 +733,7 @@ convert_mode_scalar (rtx to, rtx from, int unsignedp)
emit_move_insn (subword, fill_value);
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
return;
@@ -4547,8 +4543,7 @@ emit_move_multi_word (machine_mode mode, rtx x, rtx y)
last_insn = emit_move_insn (xpart, ypart);
}
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
/* Show the output dies here. This is necessary for SUBREGs
of pseudos since we cannot track their lifetimes correctly;
@@ -4769,8 +4764,7 @@ gen_move_insn (rtx x, rtx y)
start_sequence ();
emit_move_insn_1 (x, y);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
@@ -9639,8 +9633,7 @@ expand_cond_expr_using_cmove (tree treeop0
ATTRIBUTE_UNUSED,
and return. */
if (insn)
{
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn (seq);
return convert_modes (orig_mode, mode, temp, 0);
}
@@ -9707,12 +9700,10 @@ expand_expr_divmod (tree_code code, machine_mode mode,
tree treeop0,
do_pending_stack_adjust ();
start_sequence ();
rtx uns_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 1);
- rtx_insn *uns_insns = get_insns ();
- end_sequence ();
+ rtx_insn *uns_insns = end_sequence ();
start_sequence ();
rtx sgn_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 0);
- rtx_insn *sgn_insns = get_insns ();
- end_sequence ();
+ rtx_insn *sgn_insns = end_sequence ();
unsigned uns_cost = seq_cost (uns_insns, speed_p);
unsigned sgn_cost = seq_cost (sgn_insns, speed_p);
bool was_tie = false;
@@ -10310,8 +10301,7 @@ expand_expr_real_2 (const_sepops ops, rtx target,
machine_mode tmode,
op0, op1, NULL_RTX, unsignedp);
divmul_ret = expand_mult (mode, divmul_ret, op1, target,
unsignedp);
- rtx_insn *divmul_insns = get_insns ();
- end_sequence ();
+ rtx_insn *divmul_insns = end_sequence ();
start_sequence ();
rtx modsub_ret
= expand_expr_divmod (TRUNC_MOD_EXPR, mode, treeop0, treeop1,
@@ -10320,8 +10310,7 @@ expand_expr_real_2 (const_sepops ops, rtx target,
machine_mode tmode,
optab_default);
modsub_ret = expand_binop (mode, this_optab, op0, modsub_ret,
target, unsignedp, OPTAB_LIB_WIDEN);
- rtx_insn *modsub_insns = get_insns ();
- end_sequence ();
+ rtx_insn *modsub_insns = end_sequence ();
unsigned divmul_cost = seq_cost (divmul_insns, speed_p);
unsigned modsub_cost = seq_cost (modsub_insns, speed_p);
/* If costs are the same then use as tie breaker the other other
@@ -10563,8 +10552,7 @@ expand_expr_real_2 (const_sepops ops, rtx target,
machine_mode tmode,
and return. */
if (insn)
{
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn (seq);
return target;
}
@@ -10736,8 +10724,7 @@ expand_expr_real_2 (const_sepops ops, rtx target,
machine_mode tmode,
if (temp != dest_low)
emit_move_insn (dest_low, temp);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
temp = target ;
if (have_insn_for (ASHIFT, int_mode))
@@ -10749,8 +10736,7 @@ expand_expr_real_2 (const_sepops ops, rtx target,
machine_mode tmode,
target,
unsignedp);
- seq_old = get_insns ();
- end_sequence ();
+ seq_old = end_sequence ();
if (seq_cost (seq, speed_p)
>= seq_cost (seq_old, speed_p))
{
@@ -13274,8 +13260,7 @@ maybe_optimize_pow2p_mod_cmp (enum tree_code code, tree
*arg0, tree *arg1)
start_sequence ();
rtx mor = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type),
EXPAND_NORMAL);
- rtx_insn *moinsns = get_insns ();
- end_sequence ();
+ rtx_insn *moinsns = end_sequence ();
unsigned mocost = seq_cost (moinsns, speed_p);
mocost += rtx_cost (mor, mode, EQ, 0, speed_p);
@@ -13290,8 +13275,7 @@ maybe_optimize_pow2p_mod_cmp (enum tree_code code, tree
*arg0, tree *arg1)
start_sequence ();
rtx mur = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type),
EXPAND_NORMAL);
- rtx_insn *muinsns = get_insns ();
- end_sequence ();
+ rtx_insn *muinsns = end_sequence ();
unsigned mucost = seq_cost (muinsns, speed_p);
mucost += rtx_cost (mur, mode, EQ, 0, speed_p);
@@ -13477,8 +13461,7 @@ maybe_optimize_mod_cmp (enum tree_code code, tree
*arg0, tree *arg1)
start_sequence ();
rtx mor = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type),
EXPAND_NORMAL);
- rtx_insn *moinsns = get_insns ();
- end_sequence ();
+ rtx_insn *moinsns = end_sequence ();
unsigned mocost = seq_cost (moinsns, speed_p);
mocost += rtx_cost (mor, mode, EQ, 0, speed_p);
@@ -13498,8 +13481,7 @@ maybe_optimize_mod_cmp (enum tree_code code, tree
*arg0, tree *arg1)
start_sequence ();
rtx mur = expand_normal (t);
- rtx_insn *muinsns = get_insns ();
- end_sequence ();
+ rtx_insn *muinsns = end_sequence ();
unsigned mucost = seq_cost (muinsns, speed_p);
mucost += rtx_cost (mur, mode, LE, 0, speed_p);
diff --git a/gcc/function.cc b/gcc/function.cc
index 2ad430a8013..a5b245a98e9 100644
--- a/gcc/function.cc
+++ b/gcc/function.cc
@@ -1355,8 +1355,7 @@ emit_initial_value_sets (void)
start_sequence ();
for (i = 0; i < ivs->num_entries; i++)
emit_move_insn (ivs->entries[i].pseudo, ivs->entries[i].hard_reg);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_at_entry (seq);
}
@@ -1574,8 +1573,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
if (x != new_rtx)
emit_move_insn (new_rtx, x);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
delete_insn (insn);
@@ -1601,8 +1599,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
if (x != SET_DEST (set))
emit_move_insn (SET_DEST (set), x);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
delete_insn (insn);
@@ -1631,8 +1628,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
{
start_sequence ();
emit_move_insn (SET_DEST (set), new_rtx);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
delete_insn (insn);
@@ -1692,8 +1688,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
addr = force_reg (GET_MODE (addr), addr);
x = replace_equiv_address (x, addr, true);
}
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
if (seq)
emit_insn_before (seq, insn);
}
@@ -1718,8 +1713,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
x = expand_simple_binop (GET_MODE (x), PLUS, new_rtx,
gen_int_mode (offset, GET_MODE (x)),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
}
break;
@@ -1735,8 +1729,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
(GET_MODE (new_rtx), PLUS, new_rtx,
gen_int_mode (offset, GET_MODE (new_rtx)),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
}
x = simplify_gen_subreg (recog_data.operand_mode[i], new_rtx,
@@ -1761,8 +1754,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
}
else
x = force_reg (insn_data[insn_code].operand[i].mode, x);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
if (seq)
emit_insn_before (seq, insn);
}
@@ -5417,8 +5409,7 @@ expand_function_end (void)
anti_adjust_stack_and_probe (max_frame_size, true);
else
probe_stack_range (STACK_OLD_CHECK_PROTECT, max_frame_size);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
set_insn_locations (seq, prologue_location);
emit_insn_before (seq, stack_check_probe_note);
break;
@@ -5597,8 +5588,7 @@ expand_function_end (void)
{
start_sequence ();
clobber_return_register ();
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn_after (seq, clobber_after);
}
@@ -5630,8 +5620,7 @@ expand_function_end (void)
start_sequence ();
emit_stack_save (SAVE_FUNCTION, &tem);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn_before (seq, parm_birth_insn);
emit_stack_restore (SAVE_FUNCTION, tem);
@@ -5663,8 +5652,7 @@ get_arg_pointer_save_area (void)
start_sequence ();
emit_move_insn (validize_mem (copy_rtx (ret)),
crtl->args.internal_arg_pointer);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
push_topmost_sequence ();
emit_insn_after (seq, entry_of_function ());
@@ -5853,8 +5841,7 @@ make_split_prologue_seq (void)
start_sequence ();
emit_insn (targetm.gen_split_stack_prologue ());
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
record_insns (seq, NULL, &prologue_insn_hash);
set_insn_locations (seq, prologue_location);
@@ -5890,8 +5877,7 @@ make_prologue_seq (void)
if (!targetm.profile_before_prologue () && crtl->profile)
emit_insn (gen_blockage ());
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
set_insn_locations (seq, prologue_location);
return seq;
@@ -5994,16 +5980,14 @@ gen_call_used_regs_seq (rtx_insn *ret, unsigned int
zero_regs_type)
all call used registers. */
gcc_assert (hard_reg_set_subset_p (zeroed_hardregs, all_call_used_regs));
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
if (seq)
{
/* Emit the memory blockage and register clobber asm volatile before
the whole sequence. */
start_sequence ();
expand_asm_reg_clobber_mem_blockage (zeroed_hardregs);
- rtx_insn *seq_barrier = get_insns ();
- end_sequence ();
+ rtx_insn *seq_barrier = end_sequence ();
emit_insn_before (seq_barrier, ret);
emit_insn_before (seq, ret);
@@ -6272,8 +6256,7 @@ thread_prologue_and_epilogue_insns (void)
{
start_sequence ();
targetm.emit_epilogue_for_sibcall (as_a<rtx_call_insn *> (insn));
- ep_seq = get_insns ();
- end_sequence ();
+ ep_seq = end_sequence ();
}
else
ep_seq = targetm.gen_sibcall_epilogue ();
@@ -6282,8 +6265,7 @@ thread_prologue_and_epilogue_insns (void)
start_sequence ();
emit_note (NOTE_INSN_EPILOGUE_BEG);
emit_insn (ep_seq);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
/* Retain a map of the epilogue insns. Used in life analysis to
avoid getting rid of sibcall epilogue insns. Do this before we
@@ -6972,8 +6954,7 @@ match_asm_constraints_1 (rtx_insn *insn, rtx *p_sets, int
noutputs)
start_sequence ();
emit_move_insn (output, copy_rtx (input));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn_before (insns, insn);
constraint = ASM_OPERANDS_OUTPUT_CONSTRAINT(SET_SRC(p_sets[match]));
diff --git a/gcc/gcse.cc b/gcc/gcse.cc
index 4ae19f28430..96aae0e1718 100644
--- a/gcc/gcse.cc
+++ b/gcc/gcse.cc
@@ -2094,8 +2094,7 @@ prepare_copy_insn (rtx reg, rtx exp)
gcc_unreachable ();
}
- pat = get_insns ();
- end_sequence ();
+ pat = end_sequence ();
return pat;
}
diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc
index 6d67bef41c8..a0c6575e4e4 100644
--- a/gcc/ifcvt.cc
+++ b/gcc/ifcvt.cc
@@ -877,8 +877,7 @@ noce_emit_store_flag (struct noce_if_info *if_info, rtx x,
bool reversep,
if (recog_memoized (insn) >= 0)
{
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn (seq);
if_info->cond_earliest = if_info->jump;
@@ -975,8 +974,7 @@ noce_emit_move_insn (rtx x, rtx y)
insn = (OBJECT_P (y) || CONSTANT_P (y) || GET_CODE (y) == SUBREG)
? emit_move_insn (x, y)
: emit_insn (gen_rtx_SET (x, y));
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
if (recog_memoized (insn) <= 0)
{
@@ -1748,8 +1746,7 @@ noce_emit_cmove (struct noce_if_info *if_info, rtx x,
enum rtx_code code,
if (recog_memoized (insn) >= 0)
{
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
emit_insn (seq);
return x;
diff --git a/gcc/init-regs.cc b/gcc/init-regs.cc
index d1aa2fd8545..4465d1bc55c 100644
--- a/gcc/init-regs.cc
+++ b/gcc/init-regs.cc
@@ -109,8 +109,7 @@ initialize_uninitialized_regs (void)
CONST0_RTX defined. */
if (CONST0_RTX (GET_MODE (reg)))
emit_move_insn (reg, CONST0_RTX (GET_MODE (reg)));
- move_insn = get_insns ();
- end_sequence ();
+ move_insn = end_sequence ();
emit_insn_before (move_insn, insn);
if (dump_file)
fprintf (dump_file,
diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc
index 21eac80819a..6b04443f7cd 100644
--- a/gcc/internal-fn.cc
+++ b/gcc/internal-fn.cc
@@ -5552,8 +5552,7 @@ expand_POPCOUNT (internal_fn fn, gcall *stmt)
do_pending_stack_adjust ();
start_sequence ();
expand_unary_optab_fn (fn, stmt, popcount_optab);
- rtx_insn *popcount_insns = get_insns ();
- end_sequence ();
+ rtx_insn *popcount_insns = end_sequence ();
start_sequence ();
rtx plhs = expand_normal (lhs);
rtx pcmp = emit_store_flag (NULL_RTX, EQ, plhs, const1_rtx, lhsmode, 0, 0);
@@ -5564,8 +5563,7 @@ expand_POPCOUNT (internal_fn fn, gcall *stmt)
emit_insn (popcount_insns);
return;
}
- rtx_insn *popcount_cmp_insns = get_insns ();
- end_sequence ();
+ rtx_insn *popcount_cmp_insns = end_sequence ();
start_sequence ();
rtx op0 = expand_normal (arg);
rtx argm1 = expand_simple_binop (mode, PLUS, op0, constm1_rtx, NULL_RTX,
@@ -5583,8 +5581,7 @@ expand_POPCOUNT (internal_fn fn, gcall *stmt)
cmp = emit_store_flag (NULL_RTX, GTU, argxorargm1, argm1, mode, 1, 1);
if (cmp == NULL_RTX)
goto fail;
- rtx_insn *cmp_insns = get_insns ();
- end_sequence ();
+ rtx_insn *cmp_insns = end_sequence ();
unsigned popcount_cost = (seq_cost (popcount_insns, speed_p)
+ seq_cost (popcount_cmp_insns, speed_p));
unsigned cmp_cost = seq_cost (cmp_insns, speed_p);
@@ -5612,8 +5609,7 @@ expand_POPCOUNT (internal_fn fn, gcall *stmt)
goto fail;
}
emit_move_insn (plhs, cmp);
- rtx_insn *all_insns = get_insns ();
- end_sequence ();
+ rtx_insn *all_insns = end_sequence ();
emit_insn (all_insns);
}
}
diff --git a/gcc/ira-emit.cc b/gcc/ira-emit.cc
index b8b69c6bee9..f4454131858 100644
--- a/gcc/ira-emit.cc
+++ b/gcc/ira-emit.cc
@@ -925,8 +925,7 @@ emit_move_list (move_t list, int freq)
from = allocno_emit_reg (list->from);
from_regno = REGNO (from);
emit_move_insn (to, from);
- list->insn = get_insns ();
- end_sequence ();
+ list->insn = end_sequence ();
for (insn = list->insn; insn != NULL_RTX; insn = NEXT_INSN (insn))
{
/* The reload needs to have set up insn codes. If the
@@ -984,8 +983,7 @@ emit_move_list (move_t list, int freq)
}
ira_overall_cost += cost;
}
- result = get_insns ();
- end_sequence ();
+ result = end_sequence ();
return result;
}
diff --git a/gcc/ira.cc b/gcc/ira.cc
index 885239d1b43..979a034a87f 100644
--- a/gcc/ira.cc
+++ b/gcc/ira.cc
@@ -5609,8 +5609,7 @@ ira (FILE *f)
not put a note as commit_edges insertion will
fail. */
emit_insn (gen_rtx_USE (VOIDmode, const1_rtx));
- rtx_insn *insns = get_insns ();
- end_sequence ();
+ rtx_insn *insns = end_sequence ();
insert_insn_on_edge (insns, e);
}
break;
diff --git a/gcc/loop-doloop.cc b/gcc/loop-doloop.cc
index 9e19cc60840..fee7e204a5d 100644
--- a/gcc/loop-doloop.cc
+++ b/gcc/loop-doloop.cc
@@ -598,8 +598,7 @@ doloop_modify (class loop *loop, class niter_desc *desc,
/* Reset the counter to zero in the set_zero block. */
start_sequence ();
convert_move (counter_reg, noloop, 0);
- sequence = get_insns ();
- end_sequence ();
+ sequence = end_sequence ();
emit_insn_after (sequence, BB_END (set_zero));
set_immediate_dominator (CDI_DOMINATORS, set_zero,
diff --git a/gcc/loop-unroll.cc b/gcc/loop-unroll.cc
index b4952055318..6149cecb28d 100644
--- a/gcc/loop-unroll.cc
+++ b/gcc/loop-unroll.cc
@@ -837,8 +837,7 @@ compare_and_jump_seq (rtx op0, rtx op1, enum rtx_code comp,
if (prob.initialized_p ())
add_reg_br_prob_note (jump, prob);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
return seq;
}
@@ -954,8 +953,7 @@ unroll_loop_runtime_iterations (class loop *loop)
niter, gen_int_mode (max_unroll, desc->mode),
NULL_RTX, 0, OPTAB_LIB_WIDEN);
- init_code = get_insns ();
- end_sequence ();
+ init_code = end_sequence ();
unshare_all_rtl_in_chain (init_code);
/* Precondition the loop. */
@@ -1700,8 +1698,7 @@ insert_base_initialization (struct iv_to_split *ivts,
rtx_insn *insn)
expr = force_operand (expr, ivts->base_var);
if (expr != ivts->base_var)
emit_move_insn (ivts->base_var, expr);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
}
@@ -1742,8 +1739,7 @@ split_iv (struct iv_to_split *ivts, rtx_insn *insn,
unsigned delta)
expr = force_operand (expr, var);
if (expr != var)
emit_move_insn (var, expr);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
if (validate_change (insn, loc, var, 0))
@@ -1761,8 +1757,7 @@ split_iv (struct iv_to_split *ivts, rtx_insn *insn,
unsigned delta)
src = force_operand (src, dest);
if (src != dest)
emit_move_insn (dest, src);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_before (seq, insn);
delete_insn (insn);
@@ -1890,8 +1885,7 @@ insert_var_expansion_initialization (struct var_to_expand
*ve,
gcc_unreachable ();
}
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_insn_after (seq, BB_END (place));
}
@@ -1937,8 +1931,7 @@ combine_var_copies_in_loop_exit (struct var_to_expand
*ve, basic_block place)
expr = force_operand (sum, ve->reg);
if (expr != ve->reg)
emit_move_insn (ve->reg, expr);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
insn = BB_HEAD (place);
while (!NOTE_INSN_BASIC_BLOCK_P (insn))
diff --git a/gcc/lower-subreg.cc b/gcc/lower-subreg.cc
index 6697afb8725..eab24fd41ce 100644
--- a/gcc/lower-subreg.cc
+++ b/gcc/lower-subreg.cc
@@ -1147,8 +1147,7 @@ resolve_simple_move (rtx set, rtx_insn *insn)
resolve_simple_move (smove, minsn);
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
copy_reg_eh_region_note_forward (insn, insns, NULL_RTX);
@@ -1418,9 +1417,7 @@ resolve_shift_zext (rtx_insn *insn, bool speed_p)
emit_move_insn (dest_upper, upper_src);
}
- insns = get_insns ();
-
- end_sequence ();
+ insns = end_sequence ();
emit_insn_before (insns, insn);
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index 7dbc7fe1e00..68aaf863a97 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -1199,8 +1199,7 @@ match_reload (signed char out, signed char *ins, signed
char *outs,
accurate. */
narrow_reload_pseudo_class (in_rtx, goal_class);
lra_emit_move (copy_rtx (new_in_reg), in_rtx);
- *before = get_insns ();
- end_sequence ();
+ *before = end_sequence ();
/* Add the new pseudo to consider values of subsequent input reload
pseudos. */
lra_assert (curr_insn_input_reloads_num < LRA_MAX_INSN_RELOADS);
@@ -1235,8 +1234,7 @@ match_reload (signed char out, signed char *ins, signed
char *outs,
out_rtx = gen_rtx_STRICT_LOW_PART (VOIDmode, out_rtx);
lra_emit_move (out_rtx, copy_rtx (new_out_reg));
emit_insn (*after);
- *after = get_insns ();
- end_sequence ();
+ *after = end_sequence ();
}
*curr_id->operand_loc[out] = new_out_reg;
lra_update_dup (curr_id, out);
@@ -1444,8 +1442,7 @@ check_and_process_move (bool *change_p, bool *sec_mem_p
ATTRIBUTE_UNUSED)
emit_insn (GEN_FCN (sri.icode) (new_reg != NULL_RTX ? new_reg : dest,
src, scratch_reg));
}
- before = get_insns ();
- end_sequence ();
+ before = end_sequence ();
lra_process_new_insns (curr_insn, before, NULL, "Inserting the move");
if (new_reg != NULL_RTX)
SET_SRC (curr_insn_set) = new_reg;
@@ -1612,8 +1609,7 @@ process_addr_reg (rtx *loc, bool check_only_p, rtx_insn
**before, rtx_insn **aft
{
push_to_sequence (*before);
lra_emit_move (new_reg, reg);
- *before = get_insns ();
- end_sequence ();
+ *before = end_sequence ();
}
*loc = new_reg;
if (after != NULL)
@@ -1621,8 +1617,7 @@ process_addr_reg (rtx *loc, bool check_only_p, rtx_insn
**before, rtx_insn **aft
start_sequence ();
lra_emit_move (before_p ? copy_rtx (reg) : reg, new_reg);
emit_insn (*after);
- *after = get_insns ();
- end_sequence ();
+ *after = end_sequence ();
}
return true;
}
@@ -1639,16 +1634,14 @@ insert_move_for_subreg (rtx_insn **before, rtx_insn
**after, rtx origreg,
{
push_to_sequence (*before);
lra_emit_move (newreg, origreg);
- *before = get_insns ();
- end_sequence ();
+ *before = end_sequence ();
}
if (after)
{
start_sequence ();
lra_emit_move (origreg, newreg);
emit_insn (*after);
- *after = get_insns ();
- end_sequence ();
+ *after = end_sequence ();
}
}
@@ -4036,8 +4029,7 @@ process_address_1 (int nop, bool check_only_p,
lra_emit_move (new_reg, addr);
*ad.inner = new_reg;
}
- *before = get_insns ();
- end_sequence ();
+ *before = end_sequence ();
return true;
}
@@ -4446,8 +4438,7 @@ curr_insn_transform (bool check_only_p)
push_to_sequence (before);
before = emit_spill_move (true, new_reg, src);
emit_insn (before);
- before = get_insns ();
- end_sequence ();
+ before = end_sequence ();
lra_process_new_insns (curr_insn, before, NULL, "Changing on");
lra_set_insn_deleted (curr_insn);
}
@@ -4467,8 +4458,7 @@ curr_insn_transform (bool check_only_p)
push_to_sequence (before);
before = emit_spill_move (true, new_reg, src);
emit_insn (before);
- before = get_insns ();
- end_sequence ();
+ before = end_sequence ();
lra_process_new_insns (curr_insn, before, NULL,
"Inserting the sec. move");
}
@@ -4739,8 +4729,7 @@ curr_insn_transform (bool check_only_p)
if (align_p)
emit_move_insn (new_reg, gen_rtx_AND (GET_MODE (new_reg),
new_reg, XEXP (*loc, 1)));
}
- before = get_insns ();
- end_sequence ();
+ before = end_sequence ();
*loc = new_reg;
lra_update_dup (curr_id, i);
}
@@ -4813,8 +4802,7 @@ curr_insn_transform (bool check_only_p)
{
push_to_sequence (before);
lra_emit_move (new_reg, old);
- before = get_insns ();
- end_sequence ();
+ before = end_sequence ();
}
*loc = new_reg;
if (type != OP_IN
@@ -4825,8 +4813,7 @@ curr_insn_transform (bool check_only_p)
start_sequence ();
lra_emit_move (type == OP_INOUT ? copy_rtx (old) : old, new_reg);
emit_insn (after);
- after = get_insns ();
- end_sequence ();
+ after = end_sequence ();
*loc = new_reg;
}
for (j = 0; j < goal_alt_dont_inherit_ops_num; j++)
@@ -5968,8 +5955,7 @@ inherit_reload_reg (bool def_p, int original_regno,
lra_emit_move (original_reg, new_reg);
else
lra_emit_move (new_reg, original_reg);
- new_insns = get_insns ();
- end_sequence ();
+ new_insns = end_sequence ();
if (NEXT_INSN (new_insns) != NULL_RTX)
{
if (lra_dump_file != NULL)
@@ -6608,14 +6594,12 @@ process_invariant_for_inheritance (rtx dst_reg, rtx
invariant_rtx)
lra_reg_info[REGNO (new_reg)].restore_rtx = PATTERN (insn);
start_sequence ();
lra_emit_move (new_reg, dst_reg);
- new_insns = get_insns ();
- end_sequence ();
+ new_insns = end_sequence ();
lra_process_new_insns (curr_insn, NULL, new_insns,
"Add invariant inheritance<-original");
start_sequence ();
lra_emit_move (SET_DEST (insn_set), new_reg);
- new_insns = get_insns ();
- end_sequence ();
+ new_insns = end_sequence ();
lra_process_new_insns (insn, NULL, new_insns,
"Changing reload<-inheritance");
lra_set_insn_deleted (insn);
@@ -7117,8 +7101,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn *tail)
{
start_sequence ();
emit_move_insn (cheap, copy_rtx (dest));
- restore = get_insns ();
- end_sequence ();
+ restore = end_sequence ();
lra_process_new_insns (curr_insn, NULL, restore,
"Inserting call parameter
restore");
/* We don't need to save/restore of the pseudo from
@@ -7498,8 +7481,7 @@ remove_inheritance_pseudos (bitmap remove_pseudos)
/* We cannot just change the source. It might be
an insn different from the move. */
emit_insn (lra_reg_info[sregno].restore_rtx);
- rtx_insn *new_insns = get_insns ();
- end_sequence ();
+ rtx_insn *new_insns = end_sequence ();
lra_assert (single_set (new_insns) != NULL
&& SET_DEST (set) == SET_DEST (single_set
(new_insns)));
lra_process_new_insns (curr_insn, NULL, new_insns,
diff --git a/gcc/lra-remat.cc b/gcc/lra-remat.cc
index 5f823193aa7..ef50c5be166 100644
--- a/gcc/lra-remat.cc
+++ b/gcc/lra-remat.cc
@@ -1180,8 +1180,7 @@ do_remat (void)
start_sequence ();
emit_insn (remat_pat);
- remat_insn = get_insns ();
- end_sequence ();
+ remat_insn = end_sequence ();
if (recog_memoized (remat_insn) < 0)
remat_insn = NULL;
cand_sp_offset = cand_id->sp_offset;
diff --git a/gcc/mode-switching.cc b/gcc/mode-switching.cc
index 67ad669d3d2..18b6b9f6989 100644
--- a/gcc/mode-switching.cc
+++ b/gcc/mode-switching.cc
@@ -124,8 +124,7 @@ commit_mode_sets (struct edge_list *edge_list, int e,
struct bb_info *info)
targetm.mode_switching.emit (e, mode, cur_mode, live_at_edge);
- mode_set = get_insns ();
- end_sequence ();
+ mode_set = end_sequence ();
default_rtl_profile ();
/* Do not bother to insert empty sequence. */
@@ -1212,8 +1211,7 @@ optimize_mode_switching (void)
targetm.mode_switching.emit (entity_map[j], ptr->mode,
cur_mode, ptr->regs_live);
- mode_set = get_insns ();
- end_sequence ();
+ mode_set = end_sequence ();
/* Insert MODE_SET only if it is nonempty. */
if (mode_set != NULL_RTX)
diff --git a/gcc/optabs.cc b/gcc/optabs.cc
index fe68a25ffd4..92d6d50d55a 100644
--- a/gcc/optabs.cc
+++ b/gcc/optabs.cc
@@ -1760,8 +1760,7 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0,
rtx op1,
emit_move_insn (target_piece, x);
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (i == GET_MODE_BITSIZE (int_mode) / BITS_PER_WORD)
{
@@ -1839,8 +1838,7 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0,
rtx op1,
outof_target, into_target,
unsignedp, next_methods, shift_mask))
{
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
return target;
@@ -1962,8 +1960,7 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0,
rtx op1,
emit_move_insn (outof_target, inter);
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
if (inter != 0)
{
@@ -2222,8 +2219,7 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0,
rtx op1,
NULL_RTX, LCT_CONST, mode,
op0, mode, op1x, op1_mode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
bool trapv = trapv_binoptab_p (binoptab);
target = gen_reg_rtx (mode);
@@ -2564,8 +2560,7 @@ expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx
op1,
/* Get the part of VAL containing the value that we want. */
libval = simplify_gen_subreg (mode, libval, libval_mode,
targ0 ? 0 : GET_MODE_SIZE (mode));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
/* Move the into the desired location. */
emit_libcall_block (insns, targ0 ? targ0 : targ1, libval,
gen_rtx_fmt_ee (code, mode, op0, op1));
@@ -2698,8 +2693,7 @@ expand_clrsb_using_clz (scalar_int_mode mode, rtx op0,
rtx target)
goto fail;
}
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
add_equal_note (seq, temp, CLRSB, op0, NULL_RTX, mode);
emit_insn (seq);
@@ -2797,8 +2791,7 @@ expand_doubleword_clz_ctz_ffs (scalar_int_mode mode, rtx
op0, rtx target,
emit_label (after_label);
convert_move (target, result, true);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
add_equal_note (seq, target, optab_to_code (unoptab), xop0, NULL_RTX, mode);
emit_insn (seq);
@@ -2839,8 +2832,7 @@ expand_doubleword_popcount (scalar_int_mode mode, rtx
op0, rtx target)
t = expand_binop (word_mode, add_optab, t0, t1, target, 0, OPTAB_DIRECT);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
add_equal_note (seq, t, POPCOUNT, op0, NULL_RTX, mode);
emit_insn (seq);
@@ -3010,8 +3002,7 @@ expand_ctz (scalar_int_mode mode, rtx op0, rtx target)
return 0;
}
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
add_equal_note (seq, temp, CTZ, op0, NULL_RTX, mode);
emit_insn (seq);
@@ -3088,8 +3079,7 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
if (!temp)
goto fail;
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
add_equal_note (seq, temp, FFS, op0, NULL_RTX, mode);
emit_insn (seq);
@@ -3166,8 +3156,7 @@ expand_absneg_bit (rtx_code code, machine_mode mode,
emit_move_insn (targ_piece, op0_piece);
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
}
@@ -3448,8 +3437,7 @@ expand_unop (machine_mode mode, optab unoptab, rtx op0,
rtx target,
emit_move_insn (target_piece, x);
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
return target;
@@ -3550,8 +3538,7 @@ expand_unop (machine_mode mode, optab unoptab, rtx op0,
rtx target,
if the libcall is cse'd or moved. */
value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, outmode,
op0, mode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
target = gen_reg_rtx (outmode);
bool trapv = trapv_unoptab_p (unoptab);
@@ -3999,8 +3986,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx
op1, rtx target,
emit_move_insn (targ_piece, op0_piece);
}
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_insn (insns);
}
@@ -4951,8 +4937,7 @@ prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code
comparison,
start_sequence ();
value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
cmp_mode, x, mode, y, mode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
target = gen_reg_rtx (cmp_mode);
emit_libcall_block (insns, target, value, equiv);
@@ -5690,8 +5675,7 @@ expand_float (rtx to, rtx from, int unsignedp)
value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
GET_MODE (to), from, GET_MODE (from));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_libcall_block (insns, target, value,
gen_rtx_fmt_e (unsignedp ? UNSIGNED_FLOAT : FLOAT,
@@ -5927,8 +5911,7 @@ expand_fix (rtx to, rtx from, int unsignedp)
value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
GET_MODE (to), from, GET_MODE (from));
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_libcall_block (insns, target, value,
gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
@@ -6019,8 +6002,7 @@ expand_fixed_convert (rtx to, rtx from, int uintp, int
satp)
start_sequence ();
value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
from, from_mode);
- insns = get_insns ();
- end_sequence ();
+ insns = end_sequence ();
emit_libcall_block (insns, to, value,
gen_rtx_fmt_e (optab_to_code (tab), to_mode, from));
@@ -6162,8 +6144,7 @@ gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx
tcode)
}
emit_insn (insn);
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
return insn;
}
@@ -7800,8 +7781,7 @@ expand_atomic_fetch_op (rtx target, rtx mem, rtx val,
enum rtx_code code,
if (result)
{
/* PLUS worked so emit the insns and return. */
- tmp = get_insns ();
- end_sequence ();
+ tmp = end_sequence ();
emit_insn (tmp);
return result;
}
@@ -7880,8 +7860,7 @@ expand_atomic_fetch_op (rtx target, rtx mem, rtx val,
enum rtx_code code,
/* For after, copy the value now. */
if (!unused_result && after)
emit_move_insn (target, t1);
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
return target;
diff --git a/gcc/ree.cc b/gcc/ree.cc
index bcce9da44af..e975445957c 100644
--- a/gcc/ree.cc
+++ b/gcc/ree.cc
@@ -903,8 +903,7 @@ combine_reaching_defs (ext_cand *cand, const_rtx set_pat,
ext_state *state)
REGNO (SET_DEST (set)));
emit_move_insn (new_dst, new_src);
- rtx_insn *insn = get_insns ();
- end_sequence ();
+ rtx_insn *insn = end_sequence ();
if (NEXT_INSN (insn))
return false;
if (recog_memoized (insn) == -1)
diff --git a/gcc/reg-stack.cc b/gcc/reg-stack.cc
index 8820888d599..8ff018c6b0b 100644
--- a/gcc/reg-stack.cc
+++ b/gcc/reg-stack.cc
@@ -2989,8 +2989,7 @@ compensate_edge (edge e)
change_stack (after, ®stack, target_stack, EMIT_BEFORE);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
set_insn_locations (seq, e->goto_locus);
insert_insn_on_edge (seq, e);
diff --git a/gcc/reload1.cc b/gcc/reload1.cc
index 64ec74e2bf5..a26d07c5cbe 100644
--- a/gcc/reload1.cc
+++ b/gcc/reload1.cc
@@ -7540,8 +7540,7 @@ emit_input_reload_insns (class insn_chain *chain, struct
reload *rl,
copy_reg_eh_region_note_forward (insn, get_insns (), NULL);
/* End this sequence. */
- *where = get_insns ();
- end_sequence ();
+ *where = end_sequence ();
/* Update reload_override_in so that delete_address_reloads_1
can see the actual register usage. */
diff --git a/gcc/sel-sched-ir.cc b/gcc/sel-sched-ir.cc
index d41cac0bb11..719042b61c6 100644
--- a/gcc/sel-sched-ir.cc
+++ b/gcc/sel-sched-ir.cc
@@ -5862,8 +5862,7 @@ setup_nop_and_exit_insns (void)
start_sequence ();
emit_insn (nop_pattern);
- exit_insn = get_insns ();
- end_sequence ();
+ exit_insn = end_sequence ();
set_block_for_insn (exit_insn, EXIT_BLOCK_PTR_FOR_FN (cfun));
}
diff --git a/gcc/shrink-wrap.cc b/gcc/shrink-wrap.cc
index 94ac0bf6788..d135a540f36 100644
--- a/gcc/shrink-wrap.cc
+++ b/gcc/shrink-wrap.cc
@@ -1559,8 +1559,7 @@ emit_common_heads_for_components (sbitmap components)
{
start_sequence ();
targetm.shrink_wrap.emit_prologue_components (pro);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
record_prologue_seq (seq);
emit_insn_after (seq, bb_note (bb));
@@ -1572,8 +1571,7 @@ emit_common_heads_for_components (sbitmap components)
{
start_sequence ();
targetm.shrink_wrap.emit_epilogue_components (epi);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
record_epilogue_seq (seq);
emit_insn_after (seq, bb_note (bb));
@@ -1659,8 +1657,7 @@ emit_common_tails_for_components (sbitmap components)
{
start_sequence ();
targetm.shrink_wrap.emit_epilogue_components (epi);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
record_epilogue_seq (seq);
if (control_flow_insn_p (last_insn))
@@ -1675,8 +1672,7 @@ emit_common_tails_for_components (sbitmap components)
{
start_sequence ();
targetm.shrink_wrap.emit_prologue_components (pro);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
record_prologue_seq (seq);
if (control_flow_insn_p (last_insn))
@@ -1740,8 +1736,7 @@ insert_prologue_epilogue_for_components (sbitmap
components)
/* Put the epilogue components in place. */
start_sequence ();
targetm.shrink_wrap.emit_epilogue_components (epi);
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
record_epilogue_seq (seq);
if (e->flags & EDGE_SIBCALL)
@@ -1764,8 +1759,7 @@ insert_prologue_epilogue_for_components (sbitmap
components)
/* Put the prologue components in place. */
start_sequence ();
targetm.shrink_wrap.emit_prologue_components (pro);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
record_prologue_seq (seq);
insert_insn_on_edge (seq, e);
diff --git a/gcc/tree-outof-ssa.cc b/gcc/tree-outof-ssa.cc
index c2fe39874fb..d7e9ddbd082 100644
--- a/gcc/tree-outof-ssa.cc
+++ b/gcc/tree-outof-ssa.cc
@@ -264,8 +264,7 @@ emit_partition_copy (rtx dest, rtx src, int unsignedsrcp,
tree sizeexp)
emit_move_insn (dest, src);
do_pending_stack_adjust ();
- rtx_insn *seq = get_insns ();
- end_sequence ();
+ rtx_insn *seq = end_sequence ();
return seq;
}
@@ -357,8 +356,7 @@ insert_value_copy_on_edge (edge e, int dest, tree src,
location_t locus)
emit_move_insn (dest_rtx, x);
do_pending_stack_adjust ();
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
insert_insn_on_edge (seq, e);
}
diff --git a/gcc/tree-ssa-loop-ivopts.cc b/gcc/tree-ssa-loop-ivopts.cc
index e37b24062f7..a2150818a43 100644
--- a/gcc/tree-ssa-loop-ivopts.cc
+++ b/gcc/tree-ssa-loop-ivopts.cc
@@ -3883,8 +3883,7 @@ computation_cost (tree expr, bool speed)
walk_tree (&expr, prepare_decl_rtl, ®no, NULL);
start_sequence ();
rslt = expand_expr (expr, NULL_RTX, TYPE_MODE (type), EXPAND_NORMAL);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
default_rtl_profile ();
node->frequency = real_frequency;
--
2.43.0
