Add rules for lowering `cbranch<mode>4` to CBB/CBH/CB when CMPBR
extension is enabled.

gcc/ChangeLog:

        * config/aarch64/aarch64.md (cbranch<mode>4): emit CMPBR
        instructions if possible.
        (cbranch<SHORT:mode>4): new expand rule.
        (aarch64_cb<GPI:mode>): likewise.
        (aarch64_cb<SHORT:mode>): likewise.
        * config/aarch64/iterators.md (cmpbr_suffix): new mode attr.
        * config/aarch64/predicates.md (const_0_to_63_operand): new
        predicate.
        (aarch64_cb_immediate): likewise.
        (aarch64_cb_operand): likewise.

gcc/testsuite/ChangeLog:

        * gcc.target/aarch64/cmpbr.c: update tests.
---
 gcc/config/aarch64/aarch64.md            |  87 +++-
 gcc/config/aarch64/iterators.md          |   5 +
 gcc/config/aarch64/predicates.md         |  17 +
 gcc/testsuite/gcc.target/aarch64/cmpbr.c | 484 ++++++++---------------
 4 files changed, 275 insertions(+), 318 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 256df0dcc04..73f3e062e57 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -720,18 +720,41 @@ (define_constants
 ;; Conditional jumps
 ;; -------------------------------------------------------------------
 
-(define_expand "cbranch<mode>4"
+(define_expand "cbranch<GPI:mode>4"
   [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
                            [(match_operand:GPI 1 "register_operand")
                             (match_operand:GPI 2 "aarch64_plus_operand")])
                           (label_ref (match_operand 3))
                           (pc)))]
   ""
-  "
-  operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1],
-                                        operands[2]);
-  operands[2] = const0_rtx;
-  "
+  {
+  if (TARGET_CMPBR && aarch64_cb_operand (operands[2], <MODE>mode))
+    {
+      emit_jump_insn (gen_aarch64_cb<mode> (operands[0], operands[1],
+                                           operands[2], operands[3]));
+      DONE;
+    }
+  else
+    {
+      operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]),
+                                            operands[1], operands[2]);
+      operands[2] = const0_rtx;
+    }
+  }
+)
+
+(define_expand "cbranch<SHORT:mode>4"
+  [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
+                           [(match_operand:SHORT 1 "register_operand")
+                            (match_operand:SHORT 2 
"aarch64_cb_short_operand")])
+                          (label_ref (match_operand 3))
+                          (pc)))]
+  "TARGET_CMPBR"
+  {
+  emit_jump_insn (gen_aarch64_cb<mode> (operands[0], operands[1],
+                                       operands[2], operands[3]));
+  DONE;
+  }
 )
 
 (define_expand "cbranch<mode>4"
@@ -758,6 +781,58 @@ (define_expand "cbranchcc4"
   ""
 )
 
+;; Emit a `CB<cond> (register)` or `CB<cond> (immediate)` instruction.
+(define_insn "aarch64_cb<GPI:mode>"
+  [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
+                           [(match_operand:GPI 1 "register_operand")
+                            (match_operand:GPI 2 "aarch64_cb_operand")])
+                          (label_ref (match_operand 3))
+                          (pc)))]
+  "TARGET_CMPBR"
+  "cb%m0\\t%<w>1, %<w>2, %l3";
+  [(set_attr "type" "branch")
+   (set (attr "length")
+       (if_then_else (and (ge (minus (match_dup 3) (pc))
+                              (const_int BRANCH_LEN_N_1Kib))
+                          (lt (minus (match_dup 3) (pc))
+                              (const_int BRANCH_LEN_P_1Kib)))
+                     (const_int 4)
+                     (const_int 8)))
+   (set (attr "far_branch")
+       (if_then_else (and (ge (minus (match_dup 3) (pc))
+                              (const_int BRANCH_LEN_N_1Kib))
+                          (lt (minus (match_dup 3) (pc))
+                              (const_int BRANCH_LEN_P_1Kib)))
+                     (const_string "no")
+                     (const_string "yes")))]
+)
+
+;; Emit a `CBB<cond> (register)` or `CBH<cond> (register)` instruction.
+(define_insn "aarch64_cb<SHORT:mode>"
+  [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
+                           [(match_operand:SHORT 1 "register_operand")
+                            (match_operand:SHORT 2 
"aarch64_cb_short_operand")])
+                          (label_ref (match_operand 3))
+                          (pc)))]
+  "TARGET_CMPBR"
+  "cb<SHORT:cmpbr_suffix>%m0\\t%<w>1, %<w>2, %l3";
+  [(set_attr "type" "branch")
+   (set (attr "length")
+       (if_then_else (and (ge (minus (match_dup 3) (pc))
+                              (const_int BRANCH_LEN_N_1Kib))
+                          (lt (minus (match_dup 3) (pc))
+                              (const_int BRANCH_LEN_P_1Kib)))
+                     (const_int 4)
+                     (const_int 8)))
+   (set (attr "far_branch")
+       (if_then_else (and (ge (minus (match_dup 3) (pc))
+                              (const_int BRANCH_LEN_N_1Kib))
+                          (lt (minus (match_dup 3) (pc))
+                              (const_int BRANCH_LEN_P_1Kib)))
+                     (const_string "no")
+                     (const_string "yes")))]
+)
+
 ;; Emit `B<cond>`, assuming that the condition is already in the CC register.
 (define_insn "aarch64_bcond"
   [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 146453b0516..5c4db3fc109 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -2879,6 +2879,11 @@ (define_code_attr cmp_op [(lt "lt")
                          (geu "hs")
                          (gtu "hi")])
 
+(define_mode_attr cmpbr_suffix [(QI "b")
+                               (HI "h")
+                               (SI "")
+                               (DI "")])
+
 (define_code_attr fix_trunc_optab [(fix "fix_trunc")
                                   (unsigned_fix "fixuns_trunc")])
 
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 1ab1c696c62..0fc4dabba2a 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -50,6 +50,10 @@ (define_predicate "const_0_to_7_operand"
   (and (match_code "const_int")
        (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
 
+(define_predicate "const_1_to_63_operand"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (INTVAL (op), 0, 63)")))
+
 (define_predicate "const_0_to_4_step_4_operand"
   (and (match_code "const_int")
        (match_test "IN_RANGE (INTVAL (op), 0, 4)")
@@ -82,6 +86,8 @@ (define_predicate "subreg_lowpart_operator"
        (and (match_code "subreg")
            (match_test "subreg_lowpart_p (op)"))))
 
+
+
 (define_predicate "aarch64_ccmp_immediate"
   (and (match_code "const_int")
        (match_test "IN_RANGE (INTVAL (op), -31, 31)")))
@@ -130,6 +136,17 @@ (define_predicate "aarch64_reg_or_xor_imm"
         (and (match_code "const_vector")
              (match_test "aarch64_simd_valid_xor_imm (op)"))))
 
+(define_predicate "aarch64_cb_immediate"
+  (match_operand 0 "const_1_to_63_operand"))
+
+(define_predicate "aarch64_cb_operand"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "aarch64_cb_immediate")))
+
+(define_predicate "aarch64_cb_short_operand"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "const0_operand")))
+
 (define_predicate "aarch64_fp_compare_operand"
   (ior (match_operand 0 "register_operand")
        (and (match_code "const_double")
diff --git a/gcc/testsuite/gcc.target/aarch64/cmpbr.c 
b/gcc/testsuite/gcc.target/aarch64/cmpbr.c
index 728d6ead91c..901c18dba4c 100644
--- a/gcc/testsuite/gcc.target/aarch64/cmpbr.c
+++ b/gcc/testsuite/gcc.target/aarch64/cmpbr.c
@@ -75,860 +75,740 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** u8_x0_eq_x1:
-**     and     w1, w1, 255
-**     cmp     w1, w0, uxtb
-**     beq     .L4
+**     cbbeq   w1, w0, .L4
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u8_x0_ne_x1:
-**     and     w1, w1, 255
-**     cmp     w1, w0, uxtb
-**     beq     .L6
+**     cbbeq   w1, w0, .L6
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ult_x1:
-**     and     w1, w1, 255
-**     cmp     w1, w0, uxtb
-**     bls     .L8
+**     cbbls   w1, w0, .L8
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ule_x1:
-**     and     w1, w1, 255
-**     cmp     w1, w0, uxtb
-**     bcc     .L10
+**     cbbcc   w1, w0, .L10
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ugt_x1:
-**     and     w1, w1, 255
-**     cmp     w1, w0, uxtb
-**     bcs     .L12
+**     cbbcs   w1, w0, .L12
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_uge_x1:
-**     and     w1, w1, 255
-**     cmp     w1, w0, uxtb
-**     bhi     .L14
+**     cbbhi   w1, w0, .L14
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_slt_x1:
-**     sxtb    w1, w1
-**     cmp     w1, w0, sxtb
-**     ble     .L16
+**     cbble   w1, w0, .L16
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sle_x1:
-**     sxtb    w1, w1
-**     cmp     w1, w0, sxtb
-**     blt     .L18
+**     cbblt   w1, w0, .L18
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sgt_x1:
-**     sxtb    w1, w1
-**     cmp     w1, w0, sxtb
-**     bge     .L20
+**     cbbge   w1, w0, .L20
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sge_x1:
-**     sxtb    w1, w1
-**     cmp     w1, w0, sxtb
-**     bgt     .L22
+**     cbbgt   w1, w0, .L22
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_eq_x1:
-**     and     w1, w1, 65535
-**     cmp     w1, w0, uxth
-**     beq     .L25
+**     cbheq   w1, w0, .L25
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u16_x0_ne_x1:
-**     and     w1, w1, 65535
-**     cmp     w1, w0, uxth
-**     beq     .L27
+**     cbheq   w1, w0, .L27
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ult_x1:
-**     and     w1, w1, 65535
-**     cmp     w1, w0, uxth
-**     bls     .L29
+**     cbhls   w1, w0, .L29
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ule_x1:
-**     and     w1, w1, 65535
-**     cmp     w1, w0, uxth
-**     bcc     .L31
+**     cbhcc   w1, w0, .L31
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ugt_x1:
-**     and     w1, w1, 65535
-**     cmp     w1, w0, uxth
-**     bcs     .L33
+**     cbhcs   w1, w0, .L33
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_uge_x1:
-**     and     w1, w1, 65535
-**     cmp     w1, w0, uxth
-**     bhi     .L35
+**     cbhhi   w1, w0, .L35
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_slt_x1:
-**     sxth    w1, w1
-**     cmp     w1, w0, sxth
-**     ble     .L37
+**     cbhle   w1, w0, .L37
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sle_x1:
-**     sxth    w1, w1
-**     cmp     w1, w0, sxth
-**     blt     .L39
+**     cbhlt   w1, w0, .L39
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sgt_x1:
-**     sxth    w1, w1
-**     cmp     w1, w0, sxth
-**     bge     .L41
+**     cbhge   w1, w0, .L41
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sge_x1:
-**     sxth    w1, w1
-**     cmp     w1, w0, sxth
-**     bgt     .L43
+**     cbhgt   w1, w0, .L43
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_eq_x1:
-**     cmp     w0, w1
-**     beq     .L46
+**     cbeq    w0, w1, .L46
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u32_x0_ne_x1:
-**     cmp     w0, w1
-**     beq     .L48
+**     cbeq    w0, w1, .L48
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_ult_x1:
-**     cmp     w0, w1
-**     bcs     .L50
+**     cbcs    w0, w1, .L50
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_ule_x1:
-**     cmp     w0, w1
-**     bhi     .L52
+**     cbhi    w0, w1, .L52
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_ugt_x1:
-**     cmp     w0, w1
-**     bls     .L54
+**     cbls    w0, w1, .L54
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_uge_x1:
-**     cmp     w0, w1
-**     bcc     .L56
+**     cbcc    w0, w1, .L56
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_slt_x1:
-**     cmp     w0, w1
-**     bge     .L58
+**     cbge    w0, w1, .L58
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_sle_x1:
-**     cmp     w0, w1
-**     bgt     .L60
+**     cbgt    w0, w1, .L60
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_sgt_x1:
-**     cmp     w0, w1
-**     ble     .L62
+**     cble    w0, w1, .L62
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_sge_x1:
-**     cmp     w0, w1
-**     blt     .L64
+**     cblt    w0, w1, .L64
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_eq_x1:
-**     cmp     x0, x1
-**     beq     .L67
+**     cbeq    x0, x1, .L67
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u64_x0_ne_x1:
-**     cmp     x0, x1
-**     beq     .L69
+**     cbeq    x0, x1, .L69
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_ult_x1:
-**     cmp     x0, x1
-**     bcs     .L71
+**     cbcs    x0, x1, .L71
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_ule_x1:
-**     cmp     x0, x1
-**     bhi     .L73
+**     cbhi    x0, x1, .L73
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_ugt_x1:
-**     cmp     x0, x1
-**     bls     .L75
+**     cbls    x0, x1, .L75
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_uge_x1:
-**     cmp     x0, x1
-**     bcc     .L77
+**     cbcc    x0, x1, .L77
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_slt_x1:
-**     cmp     x0, x1
-**     bge     .L79
+**     cbge    x0, x1, .L79
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_sle_x1:
-**     cmp     x0, x1
-**     bgt     .L81
+**     cbgt    x0, x1, .L81
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_sgt_x1:
-**     cmp     x0, x1
-**     ble     .L83
+**     cble    x0, x1, .L83
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_sge_x1:
-**     cmp     x0, x1
-**     blt     .L85
+**     cblt    x0, x1, .L85
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_eq_42:
-**     cmp     w0, 42
-**     beq     .L88
+**     cbeq    w0, 42, .L88
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u32_x0_ne_42:
-**     cmp     w0, 42
-**     beq     .L90
+**     cbeq    w0, 42, .L90
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_ult_42:
-**     cmp     w0, 41
-**     bhi     .L92
+**     cbhi    w0, 41, .L92
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_ule_42:
-**     cmp     w0, 42
-**     bhi     .L94
+**     cbhi    w0, 42, .L94
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_ugt_42:
-**     cmp     w0, 42
-**     bls     .L96
+**     cbls    w0, 42, .L96
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_uge_42:
-**     cmp     w0, 41
-**     bls     .L98
+**     cbls    w0, 41, .L98
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_slt_42:
-**     cmp     w0, 41
-**     bgt     .L100
+**     cbgt    w0, 41, .L100
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_sle_42:
-**     cmp     w0, 42
-**     bgt     .L102
+**     cbgt    w0, 42, .L102
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_sgt_42:
-**     cmp     w0, 42
-**     ble     .L104
+**     cble    w0, 42, .L104
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_sge_42:
-**     cmp     w0, 41
-**     ble     .L106
+**     cble    w0, 41, .L106
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_eq_42:
-**     cmp     x0, 42
-**     beq     .L109
+**     cbeq    x0, 42, .L109
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u64_x0_ne_42:
-**     cmp     x0, 42
-**     beq     .L111
+**     cbeq    x0, 42, .L111
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_ult_42:
-**     cmp     x0, 41
-**     bhi     .L113
+**     cbhi    x0, 41, .L113
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_ule_42:
-**     cmp     x0, 42
-**     bhi     .L115
+**     cbhi    x0, 42, .L115
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_ugt_42:
-**     cmp     x0, 42
-**     bls     .L117
+**     cbls    x0, 42, .L117
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_uge_42:
-**     cmp     x0, 41
-**     bls     .L119
+**     cbls    x0, 41, .L119
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_slt_42:
-**     cmp     x0, 41
-**     bgt     .L121
+**     cbgt    x0, 41, .L121
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_sle_42:
-**     cmp     x0, 42
-**     bgt     .L123
+**     cbgt    x0, 42, .L123
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_sgt_42:
-**     cmp     x0, 42
-**     ble     .L125
+**     cble    x0, 42, .L125
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_sge_42:
-**     cmp     x0, 41
-**     ble     .L127
+**     cble    x0, 41, .L127
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_eq_42:
-**     and     w0, w0, 255
-**     cmp     w0, 42
-**     beq     .L130
+**     mov     w1, 42
+**     cbbeq   w0, w1, .L130
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u8_x0_ne_42:
-**     and     w0, w0, 255
-**     cmp     w0, 42
-**     beq     .L132
+**     mov     w1, 42
+**     cbbeq   w0, w1, .L132
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ult_42:
-**     and     w0, w0, 255
-**     cmp     w0, 41
-**     bhi     .L134
+**     mov     w1, 41
+**     cbbhi   w0, w1, .L134
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ule_42:
-**     and     w0, w0, 255
-**     cmp     w0, 42
-**     bhi     .L136
+**     mov     w1, 42
+**     cbbhi   w0, w1, .L136
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ugt_42:
-**     and     w0, w0, 255
-**     cmp     w0, 42
-**     bls     .L138
+**     mov     w1, 42
+**     cbbls   w0, w1, .L138
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_uge_42:
-**     and     w0, w0, 255
-**     cmp     w0, 41
-**     bls     .L140
+**     mov     w1, 41
+**     cbbls   w0, w1, .L140
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_slt_42:
-**     sxtb    w0, w0
-**     cmp     w0, 41
-**     bgt     .L142
+**     mov     w1, 41
+**     cbbgt   w0, w1, .L142
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sle_42:
-**     sxtb    w0, w0
-**     cmp     w0, 42
-**     bgt     .L144
+**     mov     w1, 42
+**     cbbgt   w0, w1, .L144
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sgt_42:
-**     sxtb    w0, w0
-**     cmp     w0, 42
-**     ble     .L146
+**     mov     w1, 42
+**     cbble   w0, w1, .L146
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sge_42:
-**     sxtb    w0, w0
-**     cmp     w0, 41
-**     ble     .L148
+**     mov     w1, 41
+**     cbble   w0, w1, .L148
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_eq_42:
-**     and     w0, w0, 65535
-**     cmp     w0, 42
-**     beq     .L151
+**     mov     w1, 42
+**     cbheq   w0, w1, .L151
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u16_x0_ne_42:
-**     and     w0, w0, 65535
-**     cmp     w0, 42
-**     beq     .L153
+**     mov     w1, 42
+**     cbheq   w0, w1, .L153
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ult_42:
-**     and     w0, w0, 65535
-**     cmp     w0, 41
-**     bhi     .L155
+**     mov     w1, 41
+**     cbhhi   w0, w1, .L155
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ule_42:
-**     and     w0, w0, 65535
-**     cmp     w0, 42
-**     bhi     .L157
+**     mov     w1, 42
+**     cbhhi   w0, w1, .L157
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ugt_42:
-**     and     w0, w0, 65535
-**     cmp     w0, 42
-**     bls     .L159
+**     mov     w1, 42
+**     cbhls   w0, w1, .L159
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_uge_42:
-**     and     w0, w0, 65535
-**     cmp     w0, 41
-**     bls     .L161
+**     mov     w1, 41
+**     cbhls   w0, w1, .L161
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_slt_42:
-**     sxth    w0, w0
-**     cmp     w0, 41
-**     bgt     .L163
+**     mov     w1, 41
+**     cbhgt   w0, w1, .L163
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sle_42:
-**     sxth    w0, w0
-**     cmp     w0, 42
-**     bgt     .L165
+**     mov     w1, 42
+**     cbhgt   w0, w1, .L165
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sgt_42:
-**     sxth    w0, w0
-**     cmp     w0, 42
-**     ble     .L167
+**     mov     w1, 42
+**     cbhle   w0, w1, .L167
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sge_42:
-**     sxth    w0, w0
-**     cmp     w0, 41
-**     ble     .L169
+**     mov     w1, 41
+**     cbhle   w0, w1, .L169
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_eq_65:
-**     and     w0, w0, 255
-**     cmp     w0, 65
-**     beq     .L172
+**     mov     w1, 65
+**     cbbeq   w0, w1, .L172
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u8_x0_ne_65:
-**     and     w0, w0, 255
-**     cmp     w0, 65
-**     beq     .L174
+**     mov     w1, 65
+**     cbbeq   w0, w1, .L174
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ult_65:
-**     and     w0, w0, 255
-**     cmp     w0, 64
-**     bhi     .L176
+**     mov     w1, 64
+**     cbbhi   w0, w1, .L176
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ule_65:
-**     and     w0, w0, 255
-**     cmp     w0, 65
-**     bhi     .L178
+**     mov     w1, 65
+**     cbbhi   w0, w1, .L178
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ugt_65:
-**     and     w0, w0, 255
-**     cmp     w0, 65
-**     bls     .L180
+**     mov     w1, 65
+**     cbbls   w0, w1, .L180
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_uge_65:
-**     and     w0, w0, 255
-**     cmp     w0, 64
-**     bls     .L182
+**     mov     w1, 64
+**     cbbls   w0, w1, .L182
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_slt_65:
-**     sxtb    w0, w0
-**     cmp     w0, 64
-**     bgt     .L184
+**     mov     w1, 64
+**     cbbgt   w0, w1, .L184
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sle_65:
-**     sxtb    w0, w0
-**     cmp     w0, 65
-**     bgt     .L186
+**     mov     w1, 65
+**     cbbgt   w0, w1, .L186
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sgt_65:
-**     sxtb    w0, w0
-**     cmp     w0, 65
-**     ble     .L188
+**     mov     w1, 65
+**     cbble   w0, w1, .L188
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sge_65:
-**     sxtb    w0, w0
-**     cmp     w0, 64
-**     ble     .L190
+**     mov     w1, 64
+**     cbble   w0, w1, .L190
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_eq_65:
-**     and     w0, w0, 65535
-**     cmp     w0, 65
-**     beq     .L193
+**     mov     w1, 65
+**     cbheq   w0, w1, .L193
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** u16_x0_ne_65:
-**     and     w0, w0, 65535
-**     cmp     w0, 65
-**     beq     .L195
+**     mov     w1, 65
+**     cbheq   w0, w1, .L195
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ult_65:
-**     and     w0, w0, 65535
-**     cmp     w0, 64
-**     bhi     .L197
+**     mov     w1, 64
+**     cbhhi   w0, w1, .L197
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ule_65:
-**     and     w0, w0, 65535
-**     cmp     w0, 65
-**     bhi     .L199
+**     mov     w1, 65
+**     cbhhi   w0, w1, .L199
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ugt_65:
-**     and     w0, w0, 65535
-**     cmp     w0, 65
-**     bls     .L201
+**     mov     w1, 65
+**     cbhls   w0, w1, .L201
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_uge_65:
-**     and     w0, w0, 65535
-**     cmp     w0, 64
-**     bls     .L203
+**     mov     w1, 64
+**     cbhls   w0, w1, .L203
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_slt_65:
-**     sxth    w0, w0
-**     cmp     w0, 64
-**     bgt     .L205
+**     mov     w1, 64
+**     cbhgt   w0, w1, .L205
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sle_65:
-**     sxth    w0, w0
-**     cmp     w0, 65
-**     bgt     .L207
+**     mov     w1, 65
+**     cbhgt   w0, w1, .L207
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sgt_65:
-**     sxth    w0, w0
-**     cmp     w0, 65
-**     ble     .L209
+**     mov     w1, 65
+**     cbhle   w0, w1, .L209
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sge_65:
-**     sxth    w0, w0
-**     cmp     w0, 64
-**     ble     .L211
+**     mov     w1, 64
+**     cbhle   w0, w1, .L211
 **     b       taken
 **     b       not_taken
 */
@@ -1095,16 +975,14 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** u8_x0_eq_0:
-**     tst     w0, 255
-**     bne     .L255
+**     cbbne   w0, wzr, .L255
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ne_0:
-**     tst     w0, 255
-**     beq     .L257
+**     cbbeq   w0, wzr, .L257
 **     b       taken
 **     b       not_taken
 */
@@ -1116,16 +994,14 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** u8_x0_ule_0:
-**     tst     w0, 255
-**     bne     .L260
+**     cbbne   w0, wzr, .L260
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u8_x0_ugt_0:
-**     tst     w0, 255
-**     beq     .L262
+**     cbbeq   w0, wzr, .L262
 **     b       taken
 **     b       not_taken
 */
@@ -1137,48 +1013,42 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** i8_x0_slt_0:
-**     tbnz    w0, 7, .L266
+**     cbblt   w0, wzr, .L266
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** i8_x0_sle_0:
-**     sxtb    w0, w0
-**     cmp     w0, 0
-**     ble     .L269
+**     cbble   w0, wzr, .L269
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** i8_x0_sgt_0:
-**     sxtb    w0, w0
-**     cmp     w0, 0
-**     ble     .L271
+**     cbble   w0, wzr, .L271
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i8_x0_sge_0:
-**     tbnz    w0, 7, .L273
+**     cbblt   w0, wzr, .L273
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_eq_0:
-**     tst     w0, 65535
-**     bne     .L275
+**     cbhne   w0, wzr, .L275
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ne_0:
-**     tst     w0, 65535
-**     beq     .L277
+**     cbheq   w0, wzr, .L277
 **     b       taken
 **     b       not_taken
 */
@@ -1190,16 +1060,14 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** u16_x0_ule_0:
-**     tst     w0, 65535
-**     bne     .L280
+**     cbhne   w0, wzr, .L280
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u16_x0_ugt_0:
-**     tst     w0, 65535
-**     beq     .L282
+**     cbheq   w0, wzr, .L282
 **     b       taken
 **     b       not_taken
 */
@@ -1211,46 +1079,42 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** i16_x0_slt_0:
-**     tbnz    w0, 15, .L286
+**     cbhlt   w0, wzr, .L286
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** i16_x0_sle_0:
-**     sxth    w0, w0
-**     cmp     w0, 0
-**     ble     .L289
+**     cbhle   w0, wzr, .L289
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** i16_x0_sgt_0:
-**     sxth    w0, w0
-**     cmp     w0, 0
-**     ble     .L291
+**     cbhle   w0, wzr, .L291
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i16_x0_sge_0:
-**     tbnz    w0, 15, .L293
+**     cbhlt   w0, wzr, .L293
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_eq_0:
-**     cbnz    w0, .L295
+**     cbne    w0, wzr, .L295
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_ne_0:
-**     cbz     w0, .L297
+**     cbeq    w0, wzr, .L297
 **     b       taken
 **     b       not_taken
 */
@@ -1262,14 +1126,14 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** u32_x0_ule_0:
-**     cbnz    w0, .L300
+**     cbne    w0, wzr, .L300
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u32_x0_ugt_0:
-**     cbz     w0, .L302
+**     cbeq    w0, wzr, .L302
 **     b       taken
 **     b       not_taken
 */
@@ -1281,44 +1145,42 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** i32_x0_slt_0:
-**     tbnz    w0, #31, .L306
+**     cblt    w0, wzr, .L306
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** i32_x0_sle_0:
-**     cmp     w0, 0
-**     ble     .L309
+**     cble    w0, wzr, .L309
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** i32_x0_sgt_0:
-**     cmp     w0, 0
-**     ble     .L311
+**     cble    w0, wzr, .L311
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i32_x0_sge_0:
-**     tbnz    w0, #31, .L313
+**     cblt    w0, wzr, .L313
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_eq_0:
-**     cbnz    x0, .L315
+**     cbne    x0, xzr, .L315
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_ne_0:
-**     cbz     x0, .L317
+**     cbeq    x0, xzr, .L317
 **     b       taken
 **     b       not_taken
 */
@@ -1330,14 +1192,14 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** u64_x0_ule_0:
-**     cbnz    x0, .L320
+**     cbne    x0, xzr, .L320
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** u64_x0_ugt_0:
-**     cbz     x0, .L322
+**     cbeq    x0, xzr, .L322
 **     b       taken
 **     b       not_taken
 */
@@ -1349,30 +1211,28 @@ COMPARE_ALL(u64, i64, 0);
 
 /*
 ** i64_x0_slt_0:
-**     tbnz    x0, #63, .L326
+**     cblt    x0, xzr, .L326
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** i64_x0_sle_0:
-**     cmp     x0, 0
-**     ble     .L329
+**     cble    x0, xzr, .L329
 **     b       not_taken
 **     b       taken
 */
 
 /*
 ** i64_x0_sgt_0:
-**     cmp     x0, 0
-**     ble     .L331
+**     cble    x0, xzr, .L331
 **     b       taken
 **     b       not_taken
 */
 
 /*
 ** i64_x0_sge_0:
-**     tbnz    x0, #63, .L333
+**     cblt    x0, xzr, .L333
 **     b       taken
 **     b       not_taken
 */
-- 
2.45.2


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