On Sun, 4 May 2025 08:45:25 -0600, Jeff Law wrote: > > > On 4/27/25 1:28 AM, Jin Ma wrote: > > For RV32 inline assembly, when handling 64-bit integer data, it is > > often necessary to process the lower and upper 32 bits separately. > > Unfortunately, we can only output the current register name > > (lower 32 bits) but not the next register name (upper 32 bits). > > > > To address this, the modifier 'H' has been added to allow users > > to handle the upper 32 bits of the data. While I believe the > > modifier 'N' (representing the next register name) might be more > > suitable for this functionality, 'N' is already in use. > > Therefore, 'H' (representing the high register) was chosen instead. > > > > Co-Authored-By: Dimitar Dimitrov<dimi...@dinux.eu> > > > > gcc/ChangeLog: > > > > * config/riscv/riscv.cc (riscv_print_operand): Add H. > > * doc/extend.texi: Document for H. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/riscv/modifier-H-error-1.c: New test. > > * gcc.target/riscv/modifier-H-error-2.c: New test. > > * gcc.target/riscv/modifier-H.c: New test. > I went ahead and pushed this to the trunk. One less patch on the > dashboard for the Tuesday meeting :-)
Apologies for the delay in addressing this patch. I’ve been on leave over the past few days. Thanks. Best regards, Jin Ma
