The following removes the TARGET_LRA_P and replaces uses with true.

        * target.def (lra_p): Remove.
        (secondary_memory_needed_mode): Adjust documentation.
        * targhooks.cc (default_lra_p): Remove.
        (default_secondary_memory_needed_mode): Adjust.
        * targhooks.h (default_lra_p): Remove.
        * doc/tm-texi.in (TARGET_LRA_P): Remove.
        * doc/tm-texi: Re-generate.
        * auto-inc-dec.cc (merge_in_block): Replace targetm.lra_p ()
        call with true.
        * combine.cc (can_combine_p): Likewise.
        * ira-lives.cc (non_conflicting_reg_copy_p): Likewise.
        * ira.cc (ira_init_once): Likewise.
        * recog.cc (constrain_operands): Likewise.
---
 gcc/auto-inc-dec.cc |  5 ++---
 gcc/combine.cc      |  2 +-
 gcc/doc/tm.texi     | 21 +++++++--------------
 gcc/doc/tm.texi.in  |  2 --
 gcc/ira-lives.cc    |  5 -----
 gcc/ira.cc          |  2 +-
 gcc/recog.cc        |  2 +-
 gcc/target.def      | 26 ++++++++------------------
 gcc/targhooks.cc    | 10 ----------
 gcc/targhooks.h     |  1 -
 10 files changed, 20 insertions(+), 56 deletions(-)

diff --git a/gcc/auto-inc-dec.cc b/gcc/auto-inc-dec.cc
index 0a1b854a9d1..ec041ecff2d 100644
--- a/gcc/auto-inc-dec.cc
+++ b/gcc/auto-inc-dec.cc
@@ -1441,9 +1441,8 @@ merge_in_block (int max_reg, basic_block bb)
          continue;
        }
 
-      /* Reload should handle auto-inc within a jump correctly, while LRA
-        is known to have issues with autoinc.  */
-      if (JUMP_P (insn) && targetm.lra_p ())
+      /* LRA is known to have issues with autoinc.  */
+      if (JUMP_P (insn))
        continue;
 
       if (dump_file)
diff --git a/gcc/combine.cc b/gcc/combine.cc
index 67cf0447607..4f52d7715c5 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -2035,7 +2035,7 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn 
*pred ATTRIBUTE_UNUSED,
   if (AUTO_INC_DEC)
     for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
       if (REG_NOTE_KIND (link) == REG_INC
-         && ((JUMP_P (i3) && targetm.lra_p ())
+         && (JUMP_P (i3)
              || reg_used_between_p (XEXP (link, 0), insn, i3)
              || (pred != NULL_RTX
                  && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred)))
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 5e305643b3a..be68c67f7a0 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -2936,21 +2936,21 @@ If @code{TARGET_SECONDARY_MEMORY_NEEDED} tells the 
compiler to use memory
 when moving between two particular registers of mode @var{mode},
 this hook specifies the mode that the memory should have.
 
-The default depends on @code{TARGET_LRA_P}.  Without LRA, the default
-is to use a word-sized mode for integral modes that are smaller than a
+The default is to use @var{mode} unmodified.
+
+With reload, the default
+was to use a word-sized mode for integral modes that are smaller than a
 a word.  This is right thing to do on most machines because it ensures
 that all bits of the register are copied and prevents accesses to the
 registers in a narrower mode, which some machines prohibit for
 floating-point registers.
 
-However, this default behavior is not correct on some machines, such as
+However, this old default behavior is not correct on some machines, such as
 the DEC Alpha, that store short integers in floating-point registers
-differently than in integer registers.  On those machines, the default
-widening will not work correctly and you must define this hook to
+differently than in integer registers.  On those machines, the old default
+widening will not work correctly and you had to define this hook to
 suppress that widening in some cases.  See the file @file{alpha.cc} for
 details.
-
-With LRA, the default is to use @var{mode} unmodified.
 @end deftypefn
 
 @deftypefn {Target Hook} void TARGET_SELECT_EARLY_REMAT_MODES (sbitmap 
@var{modes})
@@ -3047,13 +3047,6 @@ A target hook which can change allocno class for given 
pseudo from
   The default version of this target hook always returns given class.
 @end deftypefn
 
-@deftypefn {Target Hook} bool TARGET_LRA_P (void)
-A target hook which returns true if we use LRA instead of reload pass.
-
-The default version of this target hook returns true.  New ports
-should use LRA, and existing ports are encouraged to convert.
-@end deftypefn
-
 @deftypefn {Target Hook} int TARGET_REGISTER_PRIORITY (int)
 A target hook which returns the register priority number to which the
 register @var{hard_regno} belongs to.  The bigger the number, the
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index eccc4d88493..77f052f5c8f 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -2388,8 +2388,6 @@ in the reload pass.
 
 @hook TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
 
-@hook TARGET_LRA_P
-
 @hook TARGET_REGISTER_PRIORITY
 
 @hook TARGET_REGISTER_USAGE_LEVELING_P
diff --git a/gcc/ira-lives.cc b/gcc/ira-lives.cc
index 1bb13d1eaa8..a66a7a2eb2f 100644
--- a/gcc/ira-lives.cc
+++ b/gcc/ira-lives.cc
@@ -1194,11 +1194,6 @@ find_call_crossed_cheap_reg (rtx_insn *insn)
 rtx
 non_conflicting_reg_copy_p (rtx_insn *insn)
 {
-  /* Reload has issues with overlapping pseudos being assigned to the
-     same hard register, so don't allow it.  See PR87600 for details.  */
-  if (!targetm.lra_p ())
-    return NULL_RTX;
-
   rtx set = single_set (insn);
 
   /* Disallow anything other than a simple register to register copy
diff --git a/gcc/ira.cc b/gcc/ira.cc
index 885239d1b43..fdcd1db4a07 100644
--- a/gcc/ira.cc
+++ b/gcc/ira.cc
@@ -1656,7 +1656,7 @@ ira_init_once (void)
   ira_init_costs_once ();
   lra_init_once ();
 
-  ira_use_lra_p = targetm.lra_p ();
+  ira_use_lra_p = true;
 }
 
 /* Free ira_max_register_move_cost, ira_may_move_in_cost and
diff --git a/gcc/recog.cc b/gcc/recog.cc
index edf22cba807..06ccff48549 100644
--- a/gcc/recog.cc
+++ b/gcc/recog.cc
@@ -3336,7 +3336,7 @@ constrain_operands (int strict, alternative_mask 
alternatives)
                               || (strict < 0 && CONSTANT_P (op))
                               /* Before reload, accept a pseudo or hard 
register,
                                  since LRA can turn it into a mem.  */
-                              || (strict < 0 && targetm.lra_p () && REG_P (op))
+                              || (strict < 0 && REG_P (op))
                               /* During reload, accept a pseudo  */
                               || (reload_in_progress && REG_P (op)
                                   && REGNO (op) >= FIRST_PSEUDO_REGISTER)))
diff --git a/gcc/target.def b/gcc/target.def
index 38903eb567a..9ae3f6291d5 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -5785,16 +5785,6 @@ DEFHOOK
  reg_class_t, (int, reg_class_t, reg_class_t),
  default_ira_change_pseudo_allocno_class)
 
-/* Return true if we use LRA instead of reload.  */
-DEFHOOK
-(lra_p,
- "A target hook which returns true if we use LRA instead of reload pass.\n\
-\n\
-The default version of this target hook returns true.  New ports\n\
-should use LRA, and existing ports are encouraged to convert.",
- bool, (void),
- default_lra_p)
-
 /* Return register priority of given hard regno for the current target.  */
 DEFHOOK
 (register_priority,
@@ -6015,21 +6005,21 @@ DEFHOOK
 when moving between two particular registers of mode @var{mode},\n\
 this hook specifies the mode that the memory should have.\n\
 \n\
-The default depends on @code{TARGET_LRA_P}.  Without LRA, the default\n\
-is to use a word-sized mode for integral modes that are smaller than a\n\
+The default is to use @var{mode} unmodified.\n\
+\n\
+With reload, the default\n\
+was to use a word-sized mode for integral modes that are smaller than a\n\
 a word.  This is right thing to do on most machines because it ensures\n\
 that all bits of the register are copied and prevents accesses to the\n\
 registers in a narrower mode, which some machines prohibit for\n\
 floating-point registers.\n\
 \n\
-However, this default behavior is not correct on some machines, such as\n\
+However, this old default behavior is not correct on some machines, such as\n\
 the DEC Alpha, that store short integers in floating-point registers\n\
-differently than in integer registers.  On those machines, the default\n\
-widening will not work correctly and you must define this hook to\n\
+differently than in integer registers.  On those machines, the old default\n\
+widening will not work correctly and you had to define this hook to\n\
 suppress that widening in some cases.  See the file @file{alpha.cc} for\n\
-details.\n\
-\n\
-With LRA, the default is to use @var{mode} unmodified.",
+details.",
  machine_mode, (machine_mode mode),
  default_secondary_memory_needed_mode)
 
diff --git a/gcc/targhooks.cc b/gcc/targhooks.cc
index c79458e374e..18a42aa64bb 100644
--- a/gcc/targhooks.cc
+++ b/gcc/targhooks.cc
@@ -1313,12 +1313,6 @@ default_ira_callee_saved_register_cost_scale (int)
          : REG_FREQ_FROM_BB (ENTRY_BLOCK_PTR_FOR_FN (cfun)));
 }
 
-extern bool
-default_lra_p (void)
-{
-  return true;
-}
-
 int
 default_register_priority (int hard_regno ATTRIBUTE_UNUSED)
 {
@@ -1426,10 +1420,6 @@ default_secondary_reload (bool in_p ATTRIBUTE_UNUSED, 
rtx x ATTRIBUTE_UNUSED,
 machine_mode
 default_secondary_memory_needed_mode (machine_mode mode)
 {
-  if (!targetm.lra_p ()
-      && known_lt (GET_MODE_BITSIZE (mode), BITS_PER_WORD)
-      && INTEGRAL_MODE_P (mode))
-    return mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0).require ();
   return mode;
 }
 
diff --git a/gcc/targhooks.h b/gcc/targhooks.h
index f16b58798c2..dbde2b67da3 100644
--- a/gcc/targhooks.h
+++ b/gcc/targhooks.h
@@ -174,7 +174,6 @@ extern poly_int64 default_return_pops_args (tree, tree, 
poly_int64);
 extern reg_class_t default_ira_change_pseudo_allocno_class (int, reg_class_t,
                                                            reg_class_t);
 extern int default_ira_callee_saved_register_cost_scale (int);
-extern bool default_lra_p (void);
 extern int default_register_priority (int);
 extern bool default_register_usage_leveling_p (void);
 extern bool default_different_addr_displacement_p (void);
-- 
2.43.0

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