Hi Gerald, Thank you. I committed changes as per your review comments.
Ref: http://gcc.gnu.org/viewcvs?view=revision&revision=190151 Regards, Venkat. > -----Original Message----- > From: Gerald Pfeifer [mailto:ger...@pfeifer.com] > Sent: Sunday, August 05, 2012 12:24 AM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH, gcc/doc]: Document AMD btver2 enablement > > On Sat, 4 Aug 2012, venkataramanan.ku...@amd.com wrote: > > Index: gcc/doc/extend.texi > > =================================================================== > > +@item btver1 > > +AMD family 14h cpu. > > CPU... > > > @item amdfam15h > > AMD family 15h CPU. > > ...like you already had here. :-) > > > +@item btver2 > > +AMD family 16h cpu. > > CPU. > > > +@item btver2 > > +CPUs based on AMD Family 16h cores with x86-64 instruction set support. > (This > > +supersets MOVBE, F16C, BMI, AVX, PCL_MUL, AES, SSE4.2, SSE4.1, CX16, ABM, > > +SSE4A, SSSE3, SSE3, SSE2, SSE, MMX and 64-bit instruction set extensions.) > > I could not find "supsersets" as a verb in my dictionary: how > about "includes"? > > And I'd omit the parentheses around the second sentence, but this is > just a preference on my side; feel free to keep them if you prefer. > > Okay with these changes. > > Thanks, > Gerald
