Thanks, committed to trunk :)

On Fri, Apr 11, 2025 at 12:27 PM Jesse Huang <jesse.hu...@sifive.com> wrote:
>
> Codegen is incorrectly emitting a ".p2align 3" that coerces the
> alignment of the .note.gnu.property section from 4 to 8 on rv32.
>
> 2025-04-11  Jesse Huang  <jesse.hu...@sifive.com>
>
> gcc/ChangeLog
>
>         * config/riscv/riscv.cc (riscv_file_end): Fix .p2align value.
>
> gcc/testsuite/ChangeLog
>
>         * gcc.target/riscv/gnu-property-align-rv32.c: New file.
>         * gcc.target/riscv/gnu-property-align-rv64.c: New file.
> ---
>  gcc/config/riscv/riscv.cc                                | 2 +-
>  gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c | 7 +++++++
>  gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c | 7 +++++++
>  3 files changed, 15 insertions(+), 1 deletion(-)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 38f3ae7cd84..d3656a7a430 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -10382,7 +10382,7 @@ riscv_file_end ()
>        fprintf (asm_out_file, "1:\n");
>
>        /* pr_type.  */
> -      fprintf (asm_out_file, "\t.p2align\t3\n");
> +      fprintf (asm_out_file, "\t.p2align\t%u\n", p2align);
>        fprintf (asm_out_file, "2:\n");
>        fprintf (asm_out_file, "\t.long\t0xc0000000\n");
>        /* pr_datasz.  */
> diff --git a/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c 
> b/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c
> new file mode 100644
> index 00000000000..4f48cff33da
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv32.c
> @@ -0,0 +1,7 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32g_zicfiss -fcf-protection=return -mabi=ilp32d " 
> } */
> +
> +void foo() {}
> +
> +/* { dg-final { scan-assembler-times ".p2align\t2" 3 } } */
> +/* { dg-final { scan-assembler-not ".p2align\t3" } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c 
> b/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c
> new file mode 100644
> index 00000000000..1bfd1271826
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/gnu-property-align-rv64.c
> @@ -0,0 +1,7 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv64g_zicfiss -fcf-protection=return -mabi=lp64d " } 
> */
> +
> +void foo() {}
> +
> +/* { dg-final { scan-assembler-times ".p2align\t3" 3 } } */
> +/* { dg-final { scan-assembler-not ".p2align\t2" } } */
> --
> 2.39.3
>

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