On 06/04/2025 19:49, Christophe Lyon wrote:
The previous version of this test required arch v6+ (for sxth), and the number of vmov depended on the float-point ABI (where softfp needed more of them to transfer floating-point values to and from general registers).With this patch we require arch v7-a, vfp FPU and -mfloat-abi=hard, we also use -O2 to clean the generated code and convert scan-assembler-times directives into check-function-bodies. Tested on arm-none-linux-gnueabihf and several flavours of arm-none-eabi. gcc/testsuite/ChangeLog: PR target/119556 * gcc.target/arm/short-vfp-1.c: Improve dg directives.
OK. R.
--- gcc/testsuite/gcc.target/arm/short-vfp-1.c | 46 ++++++++++++++++++---- 1 file changed, 38 insertions(+), 8 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/short-vfp-1.c b/gcc/testsuite/gcc.target/arm/short-vfp-1.c index f6866c4f601..418fc279af0 100644 --- a/gcc/testsuite/gcc.target/arm/short-vfp-1.c +++ b/gcc/testsuite/gcc.target/arm/short-vfp-1.c @@ -1,45 +1,75 @@ /* { dg-do compile } */ -/* { dg-require-effective-target arm_vfp_ok } */ -/* { dg-add-options arm_vfp } */ +/* { dg-require-effective-target arm_arch_v7a_fp_hard_ok } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_arch_v7a_fp_hard } */ +/* { dg-final { check-function-bodies "**" "" } } */+/*+** test_sisf: +** vcvt.s32.f32 (s[0-9]+), s0 +** vmov r0, \1 @ int +** bx lr +*/ int test_sisf (float x) { return (int)x; }+/*+** test_hisf: +** vcvt.s32.f32 (s[0-9]+), s0 +** vmov (r[0-9]+), \1 @ int +** sxth r0, \2 +** bx lr +*/ short test_hisf (float x) { return (short)x; }+/*+** test_sfsi: +** vmov (s[0-9]+), r0 @ int +** vcvt.f32.s32 s0, \1 +** bx lr +*/ float test_sfsi (int x) { return (float)x; }+/*+** test_sfhi: +** vmov (s[0-9]+), r0 @ int +** vcvt.f32.s32 s0, \1 +** bx lr +*/ float test_sfhi (short x) { return (float)x; }+/*+** test_hisi: +** sxth r0, r0 +** bx lr +*/ short test_hisi (int x) { return (short)x; }+/*+** test_sihi: +** bx lr +*/ int test_sihi (short x) { return (int)x; } - -/* { dg-final { scan-assembler-times {vcvt\.s32\.f32\ts[0-9]+, s[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {vcvt\.f32\.s32\ts[0-9]+, s[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {vmov\ts[0-9]+, r[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {sxth\tr[0-9]+, r[0-9]+} 2 } } */
