LGTM. I'll merge it once stage one is open.
Cheers,
Claudiu
On Tue, Mar 18, 2025 at 6:23 PM Luis Silva <luis.sil...@synopsys.com> wrote:
>
> Due to the patch by Roger Sayle,
> 09881218137f4af9b7c894c2d350cf2ff8e0ee23, which
> introduces the use of the `rlc rX,0` instruction in place
> of the `mov.hs`, the add overflow test case needs to be
> updated. The previous test case was validating the `mov.hs`
> instruction, but now it must validate the `rlc` instruction
> as the new behavior.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arc/overflow-1.c: Replace mov.hs with rlc.
>
> Signed-off-by: Luis Silva <lu...@synopsys.com>
> ---
> gcc/testsuite/gcc.target/arc/overflow-1.c | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arc/overflow-1.c
> b/gcc/testsuite/gcc.target/arc/overflow-1.c
> index 01b3e8ad0fa..694c25cfe66 100644
> --- a/gcc/testsuite/gcc.target/arc/overflow-1.c
> +++ b/gcc/testsuite/gcc.target/arc/overflow-1.c
> @@ -31,9 +31,8 @@ bool addi_overflow (int32_t a, int32_t *res)
> /*
> * add.f r0,r0,r1
> * st_s r0,[r2]
> - * mov_s r0,1
> * j_s.d [blink]
> - * mov.hs r0,0
> + * rlc r0,0
> */
> bool uadd_overflow (uint32_t a, uint32_t b, uint32_t *res)
> {
> @@ -75,9 +74,8 @@ bool addi_overflow_p (int32_t a, int32_t res)
>
> /*
> * add.f 0,r0,r1
> - * mov_s r0,1
> * j_s.d [blink]
> - * mov.hs r0,0
> + * rlc r0,0
> */
> bool uadd_overflow_p (uint32_t a, uint32_t b, uint32_t res)
> {
> @@ -95,6 +93,6 @@ bool uaddi_overflow_p (uint32_t a, uint32_t res)
>
> /* { dg-final { scan-assembler-times "add.f\\s\+" 7 } } */
> /* { dg-final { scan-assembler-times "mov\.nv\\s\+" 4 } } */
> -/* { dg-final { scan-assembler-times "mov\.hs\\s\+" 2 } } */
> +/* { dg-final { scan-assembler-times "rlc\\s\+" 2 } } */
> /* { dg-final { scan-assembler-times "seths\\s\+" 2 } } */
> /* { dg-final { scan-assembler-not "cmp" } } */
> --
> 2.37.1
>
