From: Mihailo Stojanovic <mihailo.stojano...@rt-rk.com>
gcc/
* config/mips/mips.cc (mips_legitimate_combined_insn):
New function.
Cherry-picked 092a39db956a418e7e020107b062c170ed976841
from https://github.com/MIPS/gcc
Signed-off-by: Mihailo Stojanovic <mistojano...@wavecomp.com>
Signed-off-by: Faraz Shahbazker <fshahbaz...@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.ra...@htecgroup.com>
---
gcc/config/mips/mips.cc | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 1385607eafc..b1e687a0f31 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -24906,6 +24906,22 @@ mips_c_mode_for_floating_type (enum tree_index ti)
return default_mode_for_floating_type (ti);
}
+/* Implemet TARGET_LEGITIMATE_COMBINED_INSN hook. */
+
+static bool
+mips_legitimate_combined_insn (rtx_insn *insn)
+{
+ rtx p = PATTERN (insn);
+ if (GET_CODE (p) == SET
+ && GET_CODE (XEXP (p, 1)) == VEC_DUPLICATE
+ && GET_CODE (XEXP (XEXP (p, 1), 0)) == REG
+ && (GET_MODE_UNIT_SIZE (GET_MODE (XEXP (XEXP (p, 1), 0)))
+ > UNITS_PER_WORD))
+ return false;
+
+ return true;
+}
+
void
mips_bit_clear_info (enum machine_mode mode, unsigned HOST_WIDE_INT m,
int *start_pos, int *size)
@@ -25284,6 +25300,9 @@ mips_noce_conversion_profitable_p (rtx_insn *seq,
struct noce_if_info *if_info)
#undef TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
#define TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
mips_ira_change_pseudo_allocno_class
+#undef TARGET_LEGITIMATE_COMBINED_INSN
+#define TARGET_LEGITIMATE_COMBINED_INSN mips_legitimate_combined_insn
+
#undef TARGET_HARD_REGNO_SCRATCH_OK
#define TARGET_HARD_REGNO_SCRATCH_OK mips_hard_regno_scratch_ok
--
2.34.1
