This patch changes the `sqrt` builtin definition from `BUILTIN_VHSDF_DF`
to `BUILTIN_VHSDF_HSDF` in `aarch64-simd-builtins.def`, ensuring the
builtin covers half, single, and double precision variants. The redundant
`VAR1 (UNOP, sqrt, 2, FP, hf)` lines are removed, as they are no longer
needed now that `BUILTIN_VHSDF_HSDF` handles those cases.
gcc/ChangeLog:
* config/aarch64/aarch64-simd-builtins.def: Change
BUILTIN_VHSDF_DF to BUILTIN_VHSDF_HSDF
Signed-off-by: Ayan Shafqat <ayan.x.shaf...@gmail.com>
Signed-off-by: Andrew Pinski <quic_apin...@quicinc.com>
---
gcc/config/aarch64/aarch64-simd-builtins.def | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def
b/gcc/config/aarch64/aarch64-simd-builtins.def
index 6cc45b18a72..685bf0dc408 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -57,7 +57,7 @@
VAR1 (BINOPP, pmull, 0, DEFAULT, v8qi)
VAR1 (BINOPP, pmull_hi, 0, DEFAULT, v16qi)
BUILTIN_VHSDF_HSDF (BINOP, fmulx, 0, FP)
- BUILTIN_VHSDF_DF (UNOP, sqrt, 2, FP)
+ BUILTIN_VHSDF_HSDF (UNOP, sqrt, 2, FP)
BUILTIN_VDQ_I (BINOP, addp, 0, DEFAULT)
BUILTIN_VDQ_I (BINOPU, addp, 0, DEFAULT)
BUILTIN_VDQ_BHSI (UNOP, clrsb, 2, DEFAULT)
@@ -848,9 +848,6 @@
BUILTIN_VHSDF_HSDF (BINOP_USS, facgt, 0, FP)
BUILTIN_VHSDF_HSDF (BINOP_USS, facge, 0, FP)
- /* Implemented by sqrt<mode>2. */
- VAR1 (UNOP, sqrt, 2, FP, hf)
-
/* Implemented by <optab><mode>hf2. */
VAR1 (UNOP, floatdi, 2, FP, hf)
VAR1 (UNOP, floatsi, 2, FP, hf)
--
2.43.0
