Thanks, will push after verified on my hand :)
On Mon, Feb 24, 2025 at 3:20 PM Hsing Yu Peng <linopeng1...@gmail.com> wrote:
>
> Address Fei's comment.
>
> Thanks
> Lino
>
> Fei Gao <gao...@eswincomputing.com> 於 2025年2月24日 週一 下午2:20寫道：
> >
> > The case you hit is s2 set in frame mask but s1 not. So you're trying to
> > set s1 bit manually.
> > If so, riscv_adjust_multi_push_cfi_prologue seems the better place for your
> > change.
> >
> > static rtx
> > riscv_adjust_multi_push_cfi_prologue (int saved_size)
> > {
> > rtx dwarf = NULL_RTX;
> > rtx adjust_sp_rtx, reg, mem, insn;
> > unsigned int mask = cfun->machine->frame.mask;
> > int offset;
> > int saved_cnt = 0;
> >
> > - if (mask & S10_MASK)
> > - mask |= S11_MASK; /* this corner case is covered in your for loop
> > below. */
> >
> > + unsigned num_multi_push = riscv_multi_push_regs_count
> > (frame->mask);
> > + for (int i = 0; i < num_multi_push; i++)
> > + {
> > + gcc_assert (zcmp_save_reg_order[i] != INVALID_REGNUM);
> > + mask |= 1 << (zcmp_save_reg_order[i] - GP_REG_FIRST); /* here
> > mask is used
> >
> > instead of frame->mask*/
> > + }
> > ...
> >
> > BR
> > Fei
