Enable use of Armv8-M instruction set.
Account for CVE-2021-35465 mitigation [PR102035]. The
-mfix-cmse-cve-2021-35465 enabled by default, if -mcpu=cortex-m33 is
used.
gcc/
* config/arm/t-rtems: Add Cortex-M33 multilib.
---
gcc/config/arm/t-rtems | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/gcc/config/arm/t-rtems b/gcc/config/arm/t-rtems
index b2fcf572bca..797640bd4f4 100644
--- a/gcc/config/arm/t-rtems
+++ b/gcc/config/arm/t-rtems
@@ -17,8 +17,8 @@ MULTILIB_DIRNAMES += eb
MULTILIB_OPTIONS += mthumb
MULTILIB_DIRNAMES += thumb
-MULTILIB_OPTIONS +=
march=armv5te+fp/march=armv6-m/march=armv7-a/march=armv7-a+simd/march=armv7-r/march=armv7-r+fp/mcpu=cortex-r52/mcpu=cortex-m3/mcpu=cortex-m4/mcpu=cortex-m4+nofp/mcpu=cortex-m7
-MULTILIB_DIRNAMES += armv5te+fp armv6-m armv7-a
armv7-a+simd armv7-r armv7-r+fp cortex-r52 cortex-m3
cortex-m4 cortex-m4+nofp cortex-m7
+MULTILIB_OPTIONS +=
march=armv5te+fp/march=armv6-m/march=armv7-a/march=armv7-a+simd/march=armv7-r/march=armv7-r+fp/mcpu=cortex-r52/mcpu=cortex-m3/mcpu=cortex-m33/mcpu=cortex-m4/mcpu=cortex-m4+nofp/mcpu=cortex-m7
+MULTILIB_DIRNAMES += armv5te+fp armv6-m armv7-a
armv7-a+simd armv7-r armv7-r+fp cortex-r52 cortex-m3
cortex-m33 cortex-m4 cortex-m4+nofp cortex-m7
MULTILIB_OPTIONS += mfloat-abi=hard
MULTILIB_DIRNAMES += hard
@@ -33,6 +33,7 @@ MULTILIB_REQUIRED +=
mthumb/march=armv7-r+fp/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7-r
MULTILIB_REQUIRED += mthumb/mcpu=cortex-r52/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/mcpu=cortex-m3
+MULTILIB_REQUIRED += mthumb/mcpu=cortex-m33
MULTILIB_REQUIRED += mthumb/mcpu=cortex-m4/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/mcpu=cortex-m4+nofp
MULTILIB_REQUIRED += mthumb/mcpu=cortex-m7/mfloat-abi=hard
--
2.43.0
